✗ Fi.CI.BAT: failure for series starting with [01/67] drm/i915/gt: Track all timelines created using the HWSP
Patchwork
patchwork at emeril.freedesktop.org
Fri Dec 18 00:16:53 UTC 2020
== Series Details ==
Series: series starting with [01/67] drm/i915/gt: Track all timelines created using the HWSP
URL : https://patchwork.freedesktop.org/series/85053/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9501 -> Trybot_7337
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Trybot_7337 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Trybot_7337, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Trybot_7337:
### IGT changes ###
#### Possible regressions ####
* igt at i915_selftest@live at gem_contexts:
- fi-bsw-nick: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-bsw-nick/igt@i915_selftest@live@gem_contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-bsw-nick/igt@i915_selftest@live@gem_contexts.html
* igt at i915_selftest@live at gtt:
- fi-bsw-nick: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-bsw-nick/igt@i915_selftest@live@gtt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-bsw-nick/igt@i915_selftest@live@gtt.html
New tests
---------
New tests have been introduced between CI_DRM_9501 and Trybot_7337:
### New IGT tests (1) ###
* igt at i915_selftest@live at scheduler:
- Statuses : 35 pass(s)
- Exec time: [0.58, 9.42] s
Known issues
------------
Here are the changes found in Trybot_7337 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at i915_pm_rpm@module-reload:
- fi-kbl-guc: [PASS][5] -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
* igt at i915_selftest@live at gt_heartbeat:
- fi-bsw-kefka: [PASS][7] -> [DMESG-FAIL][8] ([i915#2675] / [i915#541])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html
* igt at prime_vgem@basic-fence-flip:
- fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#402]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
* igt at runner@aborted:
- fi-bsw-nick: NOTRUN -> [FAIL][11] ([i915#1436] / [i915#2722] / [i915#483])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-bsw-nick/igt@runner@aborted.html
#### Possible fixes ####
* igt at gem_close_race@basic-threads:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13] +2 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-tgl-y/igt@gem_close_race@basic-threads.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-tgl-y/igt@gem_close_race@basic-threads.html
* igt at kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [DMESG-WARN][14] ([i915#165]) -> [PASS][15] +15 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9501/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#2675]: https://gitlab.freedesktop.org/drm/intel/issues/2675
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (43 -> 38)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9501 -> Trybot_7337
CI-20190529: 20190529
CI_DRM_9501: 65ea47daf580f4465a071d2e61ccff9b6c76dc53 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5908: b8b1391f7bfff83397ddc47c0083c2c7ed06be37 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_7337: 6e6dbaa2ea5087cfe907dee2bbbb3f6b1269a50f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6e6dbaa2ea50 drm/i915: Bump default timeslicing quantum to 5ms
7ab0c911b429 drm/i915: Move saturated workload detection back to the context
8376ee084f27 drm/i915/gt: Support virtual engine queues
e242bb555646 drm/i915/gt: Skip over completed active execlists, again
3f0fcffed71a drm/i915/gt: Enable ring scheduling for gen6/7
0a2493c0508c drm/i915/gt: Implement ring scheduler for gen6/7
f269fa149910 drm/i915/gt: Enable busy-stats for ring-scheduler
c2c1b1a50b84 drm/i915/gt: Infrastructure for ring scheduling
4f92be31431b drm/i915/gt: Use client timeline address for seqno writes
70411192a299 drm/i915/gt: Support creation of 'internal' rings
b9d95439af91 drm/i915/gt: Couple tasklet scheduling for all CS interrupts
b73a2b567b98 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
13bd858f6f67 drm/i915/gt: Another tweak for flushing the tasklets
09946e59b7f5 drm/i915: Move tasklet from execlists to sched
bb229654603a drm/i915: Move scheduler queue
b2260e61e59b drm/i915: Move common active lists from engine to i915_scheduler
60f6e5dcd9b1 drm/i915: Extend the priority boosting for the display with a deadline
2eb8d4070013 drm/i915/gt: Specify a deadline for the heartbeat
ca97a304f1dc drm/i915: Fair low-latency scheduling
df8a3766ab43 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
592821d95e21 drm/i915: Fix the iterative dfs for defering requests
0fb2d0bae7d8 drm/i915: Extract the ability to defer and rerun a request later
b8cb188dcf35 drm/i915: Extract request suspension from the execlists backend
da975cfd4271 drm/i915: Extract request submission from execlists
0dd9e9ab3532 drm/i915/gt: Remove timeslice suppression
6cb009056d67 drm/i915: Improve DFS for priority inheritance
9f00c8874478 drm/i915/selftests: Exercise priority inheritance around an engine loop
37d4c9b18ce0 drm/i915/selftests: Measure set-priority duration
94992365b4a8 drm/i915: Restructure priority inheritance
9bcb2e26627c drm/i915: Teach the i915_dependency to use a double-lock
9e6178fdfdb0 drm/i915/gt: Do not suspend bonded requests if one hangs
6a8aa3d84310 drm/i915: Replace engine->schedule() with a known request operation
ca9637222ab4 drm/i915: Prune empty priolists
b39f1a769b95 drm/i915/gt: Defer the kmem_cache_free() until after the HW submit
79709149aa67 drm/i915: Remove I915_USER_PRIORITY_SHIFT
cd952932f715 drm/i915: Strip out internal priorities
ef43926065d9 drm/i915/gt: Refactor heartbeat request construction and submission
30d269668193 drm/i915/gt: Convert stats.active to plain unsigned int
c3dd0c0f26e6 drm/i915/gt: Extract busy-stats for ring-scheduler
9d6342afd038 drm/i915/gt: Drop atomic for engine->fw_active tracking
dd74f2ad276a drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()
f9570b774dfb drm/i915/gem: Reduce ctx->engines_mutex for get_engines()
b29612b87d0f drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source
21df3c279450 drm/i915: Drop i915_request.lock requirement for intel_rps_boost()
2506a1737ebe drm/i915: Drop i915_request.lock serialisation around await_start
e0d04b8c0f74 drm/i915/gem: Optimistically prune dma-resv from the shrinker.
bf5904e6d014 drm/i915/gt: Prefer recycling an idle fence
e551788322f8 drm/i915/gt: Consolidate the CS timestamp clocks
f3c90fb290a3 drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
437b0d6858b8 drm/i915/gt: ce->inflight updates are now serialised
07b941ed9a91 drm/i915/gt: Simplify virtual engine handling for execlists_hold()
9c1961dc0e6e drm/i915/gt: Resubmit the virtual engine on schedule-out
8513c7ee9d91 drm/i915/gt: Shrink the critical section for irq signaling
c2894d06d3fe drm/i915/gt: Remove virtual breadcrumb before transfer
9d5c10fad5e6 drm/i915/gt: Defer schedule_out until after the next dequeue
33ee58f590d8 drm/i915/gt: Decouple inflight virtual engines
1ae8140a8353 drm/i915/gt: Use virtual_engine during execlists_dequeue
022a50dfbc45 drm/i915/gt: Replace direct submit with direct call to tasklet
ae748fecde77 drm/i915/uc: Squelch load failure error message
68903f6fadbd drm/i915: Use cmpxchg64 for 32b compatilibity
d8f201cddd34 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
34eb6f9d8618 drm/i915/selftests: Exercise relative timeline modes
e93eb8c95b8d drm/i915/gt: Use indices for writing into relative timelines
ad77313aa905 drm/i915/gt: Add timeline "mode"
cb87c2949e0b drm/i915/gt: Track timeline GGTT offset separately from subpage offset
69dcee6add09 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
54ba3310c8b2 drm/i915/gt: Track all timelines created using the HWSP
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7337/index.html
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