[PATCH 1/2] drm/i915/display: Add some more debug into psr code

[Jouni Högander]

Add some debug into selective fetch are calculation and psr2 state
control.

Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 80002ca6a6eb..4614667b7c4e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1064,6 +1064,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
 	else
 		hsw_activate_psr1(intel_dp);
 
+	drm_dbg_kms(&dev_priv->drm, "PSR activated\n");
 	intel_dp->psr.active = true;
 }
 
@@ -1274,7 +1275,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
 		intel_de_write(dev_priv,
 			       EDP_PSR_CTL(intel_dp->psr.transcoder), val);
 	}
+
 	intel_dp->psr.active = false;
+
+	drm_dbg_kms(&dev_priv->drm, "PSR exited\n");
 }
 
 static void intel_psr_wait_exit_locked(struct intel_dp *intel_dp)
@@ -1454,10 +1458,13 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	if (intel_dp->psr.psr2_sel_fetch_enabled)
+	if (intel_dp->psr.psr2_sel_fetch_enabled) {
+		drm_dbg_kms(&dev_priv->drm, "Setting SFF bit\n");
 		intel_de_rmw(dev_priv,
 			     PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder), 0,
 			     man_trk_ctl_single_full_frame_bit_get(dev_priv));
+		drm_dbg_kms(&dev_priv->drm, "SFF bit set\n");
+	}
 
 	/*
 	 * Display WA #0884: skl+
@@ -1473,6 +1480,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
 	 * than that testing will be needed.
 	 */
 	intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
+
 }
 
 void intel_psr2_disable_plane_sel_fetch(struct intel_plane *plane,
@@ -1545,6 +1553,9 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st
 	if (!crtc_state->enable_psr2_sel_fetch)
 		return;
 
+	drm_dbg_kms(&dev_priv->drm, "psr2_man_track_ctl = 0x%x\n",
+		    crtc_state->psr2_man_track_ctl);
+
 	intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
 		       crtc_state->psr2_man_track_ctl);
 }
@@ -1556,6 +1567,9 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 val = 0;
 
+	drm_dbg_kms(&dev_priv->drm, "clip->y1 = %d, clip->y2 = %d, full_update = %s\n",
+		    clip->y1, clip->y2, str_yes_no(full_update));
+
 	if (!IS_ALDERLAKE_P(dev_priv))
 		val = PSR2_MAN_TRK_CTL_ENABLE;
 
@@ -1583,6 +1597,7 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
 		val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 + 1);
 		val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4 + 1);
 	}
+
 exit:
 	crtc_state->psr2_man_track_ctl = val;
 }
-- 
2.25.1