[PATCH 2/2] drm/i915/display: Add psr sink error status debugfs files

[Jouni Högander]

Some panels seem to not generate interrupt on PSR errors. Add
debugfs entry to read psr error status dpcd register from the
panel.

Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 45 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_psr.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.h      |  2 +
 3 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 452d773fd4e3..2a8b32664104 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -355,6 +355,50 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	return 0;
 }
 
+static int i915_edp_psr_error_status(struct seq_file *m, void *data)
+{
+	struct drm_i915_private *dev_priv = node_to_i915(m->private);
+	struct intel_dp *intel_dp = NULL;
+	struct intel_encoder *encoder;
+	int ret = 0;
+
+	if (!HAS_PSR(dev_priv))
+		return -ENODEV;
+
+	/* Find the first EDP which supports PSR */
+	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
+		u8 status, error_status;
+		const u8 errors = DP_PSR_RFB_STORAGE_ERROR |
+			DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
+			DP_PSR_LINK_CRC_ERROR;
+
+		intel_dp = enc_to_intel_dp(encoder);
+
+		ret = psr_get_status_and_error_status(intel_dp, &status, &error_status);
+		if (ret)
+			goto out;
+
+		if (status == DP_PSR_SINK_INTERNAL_ERROR && !error_status)
+			seq_printf(m, "PSR sink internal error");
+		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
+			seq_printf(m, "PSR RFB storage error");
+		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+			seq_printf(m, "PSR VSC SDP uncorrectable error");
+		if (error_status & DP_PSR_LINK_CRC_ERROR)
+			seq_printf(m, "PSR Link CRC error");
+
+		if (error_status & ~errors)
+			printk(KERN_ERR"PSR_ERROR_STATUS unhandled errors %x\n",
+			       error_status & ~errors);
+
+		/* clear status register */
+		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, error_status);
+	}
+
+out:
+	return ret;
+}
+
 static int i915_edp_psr_status(struct seq_file *m, void *data)
 {
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -1883,6 +1927,7 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
 	{"i915_vbt", i915_vbt, 0},
 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
 	{"i915_edp_psr_status", i915_edp_psr_status, 0},
+	{"i915_edp_psr_error_status", i915_edp_psr_error_status, 0},
 	{"i915_power_domain_info", i915_power_domain_info, 0},
 	{"i915_display_info", i915_display_info, 0},
 	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4614667b7c4e..72d847e93e04 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2316,7 +2316,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	mutex_init(&intel_dp->psr.lock);
 }
 
-static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
+int psr_get_status_and_error_status(struct intel_dp *intel_dp,
 					   u8 *status, u8 *error_status)
 {
 	struct drm_dp_aux *aux = &intel_dp->aux;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index f6526d9ccfdc..cdee0dbf2aaa 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -54,5 +54,7 @@ void intel_psr2_disable_plane_sel_fetch(struct intel_plane *plane,
 					const struct intel_crtc_state *crtc_state);
 void intel_psr_pause(struct intel_dp *intel_dp);
 void intel_psr_resume(struct intel_dp *intel_dp);
+int psr_get_status_and_error_status(struct intel_dp *intel_dp,
+				    u8 *status, u8 *error_status);
 
 #endif /* __INTEL_PSR_H__ */
-- 
2.25.1