[PATCH 6/8] debug
José Roberto de Souza
jose.souza at intel.com
Fri Mar 25 20:18:48 UTC 2022
debug
---
drivers/gpu/drm/drm_atomic_helper.c | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 21 ++++++-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +
drivers/gpu/drm/i915/display/intel_drrs.c | 62 ++++++++++++++++++--
5 files changed, 79 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index e6f3a966f7b86..cb8e8554f4a7a 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -417,6 +417,7 @@ mode_fixup(struct drm_atomic_state *state)
int ret;
for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
+ // here
if (!new_crtc_state->mode_changed &&
!new_crtc_state->connectors_changed)
continue;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index dc208df829f16..b8701ebc47972 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3488,6 +3488,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
+ // here
intel_psr_get_config(encoder, pipe_config);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 963d75875511b..ae2579cc807c1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7162,8 +7162,12 @@ static int intel_modeset_checks(struct intel_atomic_state *state)
static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_state,
struct intel_crtc_state *new_crtc_state)
{
- if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true))
+ struct drm_i915_private *i915 = to_i915(new_crtc_state->uapi.crtc->dev);
+
+ if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) {
+ drm_info(&i915->drm, "intel_crtc_check_fastset fail | zeh\n");
return;
+ }
new_crtc_state->uapi.mode_changed = false;
new_crtc_state->update_pipe = true;
@@ -7816,6 +7820,8 @@ static int intel_atomic_check(struct drm_device *dev,
intel_crtc_copy_uapi_to_hw_state_modeset(state, crtc);
else
intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);
+ drm_info(dev, "will not compute state for crtc%c | new_crtc_state->update_pipe=%i | zeh\n",
+ pipe_name(crtc->pipe), new_crtc_state->update_pipe);
continue;
}
@@ -7831,6 +7837,7 @@ static int intel_atomic_check(struct drm_device *dev,
if (!new_crtc_state->hw.enable)
continue;
+ // here?
ret = intel_modeset_pipe_config(state, new_crtc_state);
if (ret)
goto fail;
@@ -7842,8 +7849,11 @@ static int intel_atomic_check(struct drm_device *dev,
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
- if (!intel_crtc_needs_modeset(new_crtc_state))
+ if (!intel_crtc_needs_modeset(new_crtc_state)) {
+ drm_info(dev, "will not call intel_crtc_check_fastset for crtc%c | new_crtc_state->update_pipe=%i | zeh\n",
+ pipe_name(crtc->pipe), new_crtc_state->update_pipe);
continue;
+ }
ret = intel_modeset_pipe_config_late(new_crtc_state);
if (ret)
@@ -7903,12 +7913,16 @@ static int intel_atomic_check(struct drm_device *dev,
continue;
}
+ drm_info(dev, "lastly crtc%c new_crtc_state->update_pipe=%i | zeh\n",
+ pipe_name(crtc->pipe), new_crtc_state->update_pipe);
if (!new_crtc_state->update_pipe)
continue;
intel_crtc_copy_fastset(old_crtc_state, new_crtc_state);
}
+ drm_info(dev, "any_ms=%i | zeh\n", any_ms);
+
if (any_ms && !check_digital_port_conflicts(state)) {
drm_dbg_kms(&dev_priv->drm,
"rejecting conflicting digital port configuration\n");
@@ -8311,6 +8325,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
}
}
+ drm_info(&dev_priv->drm, "skl_commit_modeset_enables update_pipes=0x%x modeset_pipes=0x%x | zeh\n",
+ update_pipes, modeset_pipes);
+
/*
* Whenever the number of active pipes changes, we need to make sure we
* update the pipes in the right order so that their ddb allocations
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 56fc408b73746..cde316119a59d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -935,6 +935,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
return MODE_H_ILLEGAL;
+ // TODO is this being called in the fast set path?
+ drm_info(&dev_priv->drm, "intel_dp_mode_valid | zeh\n");
fixed_mode = intel_panel_fixed_mode(intel_connector, mode);
if (intel_dp_is_edp(intel_dp) && fixed_mode) {
status = intel_panel_mode_valid(intel_connector, mode);
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 7ef711deaf573..fafcb24f3e13a 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -91,9 +91,17 @@ intel_drrs_compute_config(struct intel_connector *connector,
intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode);
int pixel_clock;
+ drm_info(&i915->drm, "intel_drrs_compute_config downclock_mode=%i | zeh\n", !!downclock_mode);
+ drm_info(&i915->drm, "\tpipe_config->hw.adjusted_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&pipe_config->hw.adjusted_mode));
+ drm_info(&i915->drm, "\tpipe_config->hw.mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&pipe_config->hw.mode));
+ drm_info(&i915->drm, "\tpipe_config->uapi.adjusted_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&pipe_config->uapi.adjusted_mode));
+ drm_info(&i915->drm, "\tpipe_config->uapi.mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&pipe_config->uapi.mode));
+
if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {
if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder))
intel_zero_m_n(&pipe_config->dp_m2_n2);
+
+ drm_info(&i915->drm, "\t !can_enable_drrs()\n");
return;
}
@@ -167,6 +175,8 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
else
intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
+ drm_info(&dev_priv->drm, "intel_drrs_set_state() rate %s | zeh\n",
+ refresh_rate == DRRS_REFRESH_RATE_HIGH ? "high" : "low");
crtc->drrs.refresh_rate = refresh_rate;
}
@@ -199,6 +209,7 @@ static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *c
void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (!CRTC_STATE_HAS_DRRS(crtc_state))
return;
@@ -209,6 +220,8 @@ void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
if (intel_crtc_is_bigjoiner_slave(crtc_state))
return;
+ drm_info(&i915->drm, "intel_drrs_activate | zeh\n");
+
mutex_lock(&crtc->drrs.mutex);
/* Until the next modeset user-space will control the refresh rate */
@@ -216,17 +229,27 @@ void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
!intel_crtc_needs_modeset(crtc_state)) {
enum drrs_refresh_rate rate = DRRS_REFRESH_RATE_HIGH;
+ drm_info(&i915->drm, "\tcrtc_state->hw.adjusted_mode.clock=%i| zeh\n", crtc_state->hw.adjusted_mode.clock);
+ drm_info(&i915->drm, "\tcrtc_state->drrs_downclock_mode->clock=%i| zeh\n", crtc_state->drrs_downclock_mode->clock);
+
if (drm_mode_match(&crtc_state->hw.adjusted_mode,
crtc_state->drrs_downclock_mode,
DRM_MODE_MATCH_CLOCK))
rate = DRRS_REFRESH_RATE_LOW;
+ drm_info(&i915->drm, "\tcrtc_state->uapi.seamless_mode_changed rate=%i| zeh\n", rate);
+ drm_info(&i915->drm, "\tuapi.adjusted_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&crtc_state->uapi.adjusted_mode));
+ drm_info(&i915->drm, "\thw.adjusted_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
+ drm_info(&i915->drm, "\tcrtc_state->drrs_downclock_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(crtc_state->drrs_downclock_mode));
+
crtc->drrs.seamless_mode_switch_enabled = true;
intel_drrs_set_state(crtc, rate);
}
- if (crtc->drrs.seamless_mode_switch_enabled)
+ if (crtc->drrs.seamless_mode_switch_enabled) {
+ drm_info(&i915->drm, "\tcrtc->drrs.seamless_mode_switch_enabled\n");
goto exit;
+ }
crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder;
crtc->drrs.m_n = crtc_state->dp_m_n;
@@ -249,6 +272,7 @@ void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state,
const struct intel_crtc_state *new_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (!CRTC_STATE_HAS_DRRS(old_crtc_state))
return;
@@ -259,6 +283,12 @@ void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state,
if (intel_crtc_is_bigjoiner_slave(old_crtc_state))
return;
+ drm_info(&i915->drm, "intel_drrs_deactivate | zeh\n");
+
+ if (new_crtc_state->uapi.seamless_mode_changed) {
+ return;
+ }
+
mutex_lock(&crtc->drrs.mutex);
/*
@@ -266,10 +296,12 @@ void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state,
* control of DRRS and it will only go to the automatic mode on the
* next modeset
*/
- if ((crtc->drrs.seamless_mode_switch_enabled |
- new_crtc_state->uapi.seamless_mode_changed) &&
- !intel_crtc_needs_modeset(new_crtc_state))
+ if (crtc->drrs.seamless_mode_switch_enabled &&
+ !intel_crtc_needs_modeset(new_crtc_state)) {
+ drm_info(&i915->drm, "\tnew_crtc_state->uapi.seamless_mode_changed\n");
+ drm_info(&i915->drm, "\tcrtc->drrs.seamless_mode_switch_enabled\n");
goto exit;
+ }
if (intel_drrs_is_active(crtc))
intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
@@ -456,30 +488,48 @@ intel_drrs_init(struct intel_connector *connector,
int intel_drrs_seamless_mode_switch_check(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
const unsigned int match_mode_flags = DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_FLAGS |
DRM_MODE_MATCH_3D_FLAGS |
DRM_MODE_MATCH_ASPECT_RATIO;
- struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc_state *new_crtc_state, *old_crtc_state;
new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
if (IS_ERR(new_crtc_state))
return PTR_ERR(new_crtc_state);
+ old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
+ drm_info(&i915->drm, "intel_drrs_seamless_mode_switch_check has_drrs=%i | zeh\n", CRTC_STATE_HAS_DRRS(new_crtc_state));
+ drm_info(&i915->drm, "\tuapi.seamless_mode_changed=%i\n", new_crtc_state->uapi.seamless_mode_changed);
+
if (!CRTC_STATE_HAS_DRRS(new_crtc_state))
return -EOPNOTSUPP;
+ //drm_info(&i915->drm, "\tnew adjusted "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&new_crtc_state->uapi.adjusted_mode));
+ drm_info(&i915->drm, "\tnew mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&new_crtc_state->uapi.mode));
+ drm_info(&i915->drm, "\tnew drrs_fixed_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(new_crtc_state->drrs_fixed_mode));
+ drm_info(&i915->drm, "\tnew drrs_downclock_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(new_crtc_state->drrs_downclock_mode));
+
+ //drm_info(&i915->drm, "\told adjusted "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&old_crtc_state->uapi.adjusted_mode));
+ drm_info(&i915->drm, "\told mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(&old_crtc_state->uapi.mode));
+ drm_info(&i915->drm, "\told drrs_fixed_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(new_crtc_state->drrs_fixed_mode));
+ drm_info(&i915->drm, "\told drrs_downclock_mode "DRM_MODE_FMT " | zeh\n", DRM_MODE_ARG(old_crtc_state->drrs_downclock_mode));
+
/* Requested mode matches with fixed or downclock mode? */
if (!drm_mode_match(&new_crtc_state->uapi.mode,
new_crtc_state->drrs_fixed_mode,
match_mode_flags) &&
!drm_mode_match(&new_crtc_state->uapi.mode,
new_crtc_state->drrs_downclock_mode,
- match_mode_flags))
+ match_mode_flags)) {
+ drm_info(&i915->drm, "\tmode do not match with fixed or downclock | zeh\n");
return -EOPNOTSUPP;
+ }
drm_mode_copy(&new_crtc_state->uapi.adjusted_mode,
&new_crtc_state->uapi.mode);
+ drm_info(&i915->drm, "intel_drrs_seamless_mode_switch_check so far so good | zeh\n");
return 0;
}
--
2.35.1
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