[PATCH] Add some debug to psr2 code

[Jouni Högander]

Instrument following:

flush
invalidate
area calculation
man track configuration

Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a75b37851504..f874952d70a8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1595,6 +1595,8 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
 	struct intel_encoder *encoder;
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	if (!crtc_state->enable_psr2_sel_fetch)
 		return;
 
@@ -1619,6 +1621,11 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 val = man_trk_ctl_enable_bit_get(dev_priv);
 
+	drm_dbg_kms(&dev_priv->drm, "%s\n", full_update ? "sff" : "su");
+
+	if (!full_update)
+		drm_dbg_kms(&dev_priv->drm, "%d,%d\n", clip->y1, clip->y2);
+
 	/* SF partial frame enable has to be set even on full update */
 	val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
 
@@ -1732,11 +1739,14 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	bool full_update = false;
 	int i, ret;
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	if (!crtc_state->enable_psr2_sel_fetch)
 		return 0;
 
 	if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
 		full_update = true;
+		drm_dbg_kms(&dev_priv->drm, "pipe sup\n");
 		goto skip_sel_fetch_set_loop;
 	}
 
@@ -1759,6 +1769,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 			continue;
 
 		if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
+			drm_dbg_kms(&dev_priv->drm, "plane sup\n");
 			full_update = true;
 			break;
 		}
@@ -1819,6 +1830,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 		drm_info_once(&dev_priv->drm,
 			      "Selective fetch area calculation failed in pipe %c\n",
 			      pipe_name(crtc->pipe));
+		drm_dbg_kms(&dev_priv->drm, "calc fail\n");
 		full_update = true;
 	}
 
@@ -1850,6 +1862,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 
 		if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
 			full_update = true;
+			drm_dbg_kms(&dev_priv->drm, "plane sup 2.\n");
 			break;
 		}
 
@@ -2209,15 +2222,19 @@ static void _psr_invalidate_handle(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	if (intel_dp->psr.psr2_sel_fetch_enabled) {
 		u32 val;
 
 		if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
 			/* Send one update otherwise lag is observed in screen */
+			drm_dbg_kms(&dev_priv->drm, "upd\n");
 			intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
 			return;
 		}
 
+		drm_dbg_kms(&dev_priv->drm, "cff on\n");
 		val = man_trk_ctl_enable_bit_get(dev_priv) |
 		      man_trk_ctl_partial_frame_bit_get(dev_priv) |
 		      man_trk_ctl_continuos_full_frame(dev_priv);
@@ -2247,6 +2264,8 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
 {
 	struct intel_encoder *encoder;
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	if (origin == ORIGIN_FLIP)
 		return;
 
@@ -2301,6 +2320,8 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	if (intel_dp->psr.psr2_sel_fetch_enabled) {
 		if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
 			/* can we turn CFF off? */
@@ -2309,6 +2330,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
 					  man_trk_ctl_partial_frame_bit_get(dev_priv) |
 					  man_trk_ctl_single_full_frame_bit_get(dev_priv);
 
+				drm_dbg_kms(&dev_priv->drm, "cff off\n");
 				/*
 				 * turn continuous full frame off and do a single
 				 * full frame
@@ -2323,6 +2345,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
 			 * continuous full frame is disabled, only a single full
 			 * frame is required
 			 */
+			drm_dbg_kms(&dev_priv->drm, "upd\n");
 			psr_force_hw_tracking_exit(intel_dp);
 		}
 	} else {
@@ -2351,6 +2374,8 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 {
 	struct intel_encoder *encoder;
 
+	drm_dbg_kms(&dev_priv->drm, "\n");
+
 	for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
 		unsigned int pipe_frontbuffer_bits = frontbuffer_bits;
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-- 
2.34.1