[PATCH 09/15] drm/i915/dp: Use output bpp to get the nearest valid dsc bpp

[Ankit Nautiyal]

Use output_bpp i.e. the intermediate subsampled bpp, based on the
output_format, for computing nearest valid dsc bpp.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 7 ++++---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++++--
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 03cc249c5134..ebc9a71ed8ab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -672,7 +672,7 @@ small_joiner_ram_size_bits(struct drm_i915_private *i915)
 		return 6144 * 8;
 }
 
-u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp)
+u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 output_bpp)
 {
 	u32 bits_per_pixel = bpp;
 	int i;
@@ -686,7 +686,7 @@ u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 p
 
 	/* From XE_LPD onwards we support from bpc upto uncompressed bpp-1 BPPs */
 	if (DISPLAY_VER(i915) >= 13) {
-		bits_per_pixel = min(bits_per_pixel, pipe_bpp - 1);
+		bits_per_pixel = min(bits_per_pixel, output_bpp - 1);
 
 		/*
 		 * According to BSpec, 27 is the max DSC output bpp,
@@ -717,6 +717,7 @@ u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
 				u32 timeslots)
 {
 	u32 bits_per_pixel, max_bpp_small_joiner_ram;
+	int output_bpp = intel_dp_output_bpp(output_format, pipe_bpp);
 
 	/*
 	 * Available Link Bandwidth(Kbits/sec) = (NumberOfLanes)*
@@ -768,7 +769,7 @@ u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
 		bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
 	}
 
-	bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp);
+	bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, output_bpp);
 
 	/*
 	 * Compressed BPP in U6.4 format so multiply by 16, for Gen 11,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index ecee703ddd5f..97d79061502b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -164,7 +164,7 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
 	int slots = -EINVAL;
 	int i, num_bpc;
 	u8 dsc_bpc[3] = {0};
-	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
+	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp, output_bpp;
 	u8 dsc_max_bpc;
 	bool need_timeslot_recalc = false;
 	u32 last_compressed_bpp;
@@ -212,9 +212,11 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
 
 	last_compressed_bpp = crtc_state->dsc.compressed_bpp;
 
+	output_bpp = intel_dp_output_bpp(crtc_state->output_format, crtc_state->pipe_bpp);
+
 	crtc_state->dsc.compressed_bpp = intel_dp_dsc_nearest_valid_bpp(i915,
 									last_compressed_bpp,
-									crtc_state->pipe_bpp);
+									output_bpp);
 
 	if (crtc_state->dsc.compressed_bpp != last_compressed_bpp)
 		need_timeslot_recalc = true;
-- 
2.25.1