[PATCH 0/4] Move towards using VRR timing generator for VRR
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Wed Apr 17 14:52:15 UTC 2024
Gradually move towards using VRR timing generator when panels support
VRR. This involves setting VMin = VMax = flipline when we have a VRR
panel, but user has not set VRR property. In adaptive sync SDP the
adaptive sync operation mode is set appropriately for this case.
Since VRR framework does not need VTOTAL and instead use VRR VMAX
registers, reading and writing VTOTAL register can be avoided.
Ankit Nautiyal (4):
drm/i915/dp: fix the Adaptive sync Operation mode for SDP
drm/i915/display: Get VRR compute config before get_transcoder_timing
drm/i915/vrr: Avoid reading/writing VTOTAL when vrr is enabled
drm/i915/vrr/xe2lpd: Use VRR timing generator whenever panel supports
VRR
drivers/gpu/drm/i915/display/intel_display.c | 39 +++++++++-------
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 48 +++++++++++++-------
3 files changed, 58 insertions(+), 36 deletions(-)
--
2.40.1
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