[PATCH 0/4] Move towards using VRR timing generator for VRR

[Ankit Nautiyal]

Gradually move towards using VRR timing generator when panels support
VRR. This involves setting VMin = VMax = flipline when we have a VRR
panel, but user has not set VRR property. In adaptive sync SDP the
adaptive sync operation mode is set appropriately for this case.
Since VRR framework does not need few registers and instead use VRR VMAX
registers, reading and writing VTOTAL/VBLANK/VSYNC register can be avoided.

Ankit Nautiyal (4):
  drm/i915/dp: fix the Adaptive sync Operation mode for SDP
  drm/i915/display: Get VRR compute config before get_transcoder_timing
  drm/i915/vrr: Avoid reading/writing VTOTAL/VBLANK/VSYNC when vrr is
    enabled
  drm/i915/vrr/xe2lpd: Use VRR timing generator whenever panel supports
    VRR

 drivers/gpu/drm/i915/display/intel_display.c | 68 +++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dp.c      |  7 +-
 drivers/gpu/drm/i915/display/intel_vrr.c     | 47 +++++++++-----
 3 files changed, 81 insertions(+), 41 deletions(-)

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2.40.1