[PATCH 0/7] Implement CMRR Support
Mitul Golani
mitulkumar.ajitkumar.golani at intel.com
Wed Apr 24 08:36:41 UTC 2024
MRR is a display feature that uses adaptive sync
framework to vary Vtotal slightly to match the
content rate exactly without frame drops. This
feature is a variation of VRR where it varies Vtotal
slightly (between additional 0 and 1 Vtotal scanlines)
to match content rate exactly without frame drops
using the adaptive sync framework.
enable this feature by programing new registers for
CMRR enable, CMRR_M, CMRR_N, vmin=vmax=flipline.The
CMRR_M/CMRR_N ratio represents the fractional part
in (actual refresh rate/target refresh rate) * origVTotal.
--v6:
- CMRR handling in co-existatnce of LRR and DRRS
- Correct vtotal paramas accuracy and add 2 digit precision.
--v7:
- Rebased patches in-accordance to AS SDP merge.
- Add neccessary gaurd to prevent crtc_state mismatch
during intel_vrr_get_config.
-v8:
- Add support for AS SDP for CMRR.
- update palce holder for CMRR register(Jani).
Mitul Golani (7):
drm/i915: Define and compute Transcoder CMRR registers
drm/i915: Add Enable/Disable for CMRR based on VRR state
drm/i915: Compute CMRR and calculate vtotal
Add refresh rate divider to struct representing AS SDP
drm/i915/display: Add support for pack and unpack
drm/i915/display: Compute Adaptive sync SDP params
drm/i915/display: Compute vrr vsync params
drivers/gpu/drm/i915/display/intel_display.c | 61 ++++++-
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 6 +
drivers/gpu/drm/i915/display/intel_dp.c | 20 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 162 +++++++++++++++---
drivers/gpu/drm/i915/i915_reg.h | 10 ++
include/drm/display/drm_dp_helper.h | 1 +
7 files changed, 222 insertions(+), 39 deletions(-)
--
2.25.1
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