[PATCH v3 5/6] display/psr: Add latency for PSR

[Mitul Golani]

Count and add latency accounter for PSR enablement.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_psr.h |  1 +
 2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 39aa46de15e4..ce2e3b9aaea1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -243,6 +243,23 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
 	}
 }
 
+int calc_psr_latency(struct intel_crtc_state *crtc_state)
+{
+	int val, enabled, linetime, io_wake_lines;
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+
+	linetime = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.htotal * 1000,
+				intel_crtc_dotclock(crtc_state));
+	val = intel_de_read(i915,
+			    EDP_PSR2_CTL(i915, crtc_state->cpu_transcoder));
+	enabled = val & EDP_PSR2_ENABLE;
+	io_wake_lines = LNL_EDP_PSR2_IO_BUFFER_WAKE_MASK & val;
+
+	return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
+					enabled * io_wake_lines * linetime);
+}
+
 static bool psr2_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 5f26f61f82aa..756aef4b4233 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -24,6 +24,7 @@ struct intel_plane_state;
 #define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
 				    (intel_dp)->psr.source_panel_replay_support)
 
+int calc_psr_latency(struct intel_crtc_state *crtc_state);
 bool intel_encoder_can_psr(struct intel_encoder *encoder);
 bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
 				  const struct intel_crtc_state *crtc_state);
-- 
2.46.0