[PATCH v3 6/6] display/vrr: Update guardband based on enabled latency

[Mitul Golani]

Instead of computing guardband to max vblank, account for
the differenct feature latency.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 2de1c04bf1a5..e896d316ab16 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -10,7 +10,12 @@
 #include "intel_display_types.h"
 #include "intel_vrr.h"
 #include "intel_vrr_regs.h"
+#include "intel_alpm.h"
+#include "intel_crtc.h"
 #include "intel_dp.h"
+#include "intel_psr.h"
+#include "skl_watermark.h"
+#include "skl_scaler.h"
 
 #define FIXED_POINT_PRECISION		100
 #define CMRR_PRECISION_TOLERANCE	10
@@ -244,7 +249,21 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	int required_latency, sagv_block_time_in_scanline;
+
+	sagv_block_time_in_scanline =
+		intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
+					 i915->display.sagv.block_time_us);
+	/*
+	 * TODO: DSC and SDP latency to be computed
+	 */
+	required_latency =
+	max3(crtc_state->framestart_delay + calc_scaler_prefill(crtc_state) +
+		  calc_wm0_prefill(crtc_state) + sagv_block_time_in_scanline,
+		  calc_psr_latency(crtc_state),
+		  calc_alpm_latency(crtc_state));
 
 	if (crtc_state->vrr.enable) {
 		/*
@@ -253,7 +272,7 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
 		 */
 		if (DISPLAY_VER(display) >= 13) {
 			crtc_state->vrr.guardband =
-				crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start;
+			intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, required_latency);
 		} else {
 			crtc_state->vrr.pipeline_full =
 				min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start -
-- 
2.46.0