[PATCH i-g-t 1/3] lib/igt_psr: Rename PSR_MODE_2_ET as PSR_MODE_2_SEL_FETCH_ET
Jouni Högander
jouni.hogander at intel.com
Thu Jan 30 08:42:46 UTC 2025
It's more unified to name PSR2 Early Transport mode as
PSR_MODE_2_SEL_FETCH_ET as HW which would support PSR2 without
selective fetch and Early Transport doesn't exist.
Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
lib/igt_psr.c | 2 +-
lib/igt_psr.h | 2 +-
tests/intel/kms_psr2_sf.c | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 83c21e6ba..9e0dc17a6 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -329,7 +329,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
strstr(buf, "Sink support: yes [0x04]") ||
(strstr(line, "PSR = yes") &&
(strstr(line, "[0x03]") || strstr(line, "[0x04]")));
- case PSR_MODE_2_ET:
+ case PSR_MODE_2_SEL_FETCH_ET:
return strstr(buf, "Sink support: yes [0x04]") ||
(strstr(line, "PSR = yes") && strstr(line, "[0x04]"));
case PR_MODE:
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 7639f8d46..8e4acf074 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -35,7 +35,7 @@ enum psr_mode {
PSR_MODE_1,
PSR_MODE_2,
PSR_MODE_2_SEL_FETCH,
- PSR_MODE_2_ET,
+ PSR_MODE_2_SEL_FETCH_ET,
PR_MODE,
PR_MODE_SEL_FETCH,
PR_MODE_SEL_FETCH_ET,
diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
index cd4226070..939ec7a4f 100644
--- a/tests/intel/kms_psr2_sf.c
+++ b/tests/intel/kms_psr2_sf.c
@@ -278,7 +278,8 @@ static bool set_sel_fetch_mode_for_output(data_t *data)
data->psr_mode = PR_MODE_SEL_FETCH;
data->et_flag = true;
} else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
- PSR_MODE_2_ET, data->output)) {
+ PSR_MODE_2_SEL_FETCH_ET,
+ data->output)) {
supported = true;
data->psr_mode = PSR_MODE_2;
data->et_flag = true;
--
2.43.0
More information about the Intel-gfx-trybot
mailing list