[PATCH v6 17/18] drm/i915/vrr: Move Adjustment flipline configuration

[Mitul Golani]

Move Adjustment flipline configuration just before enabling
DC balance bit as per sequecing.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index a758ce58d154..c7d376007a8d 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -661,8 +661,6 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
 			       VRR_DCB_ADJ_VMAX(crtc_state->vrr.vmax - 1));
 		intel_de_write(display, TRANS_VRR_DCB_VMAX(cpu_transcoder),
 			       VRR_DCB_VMAX(crtc_state->vrr.vmax - 1));
-		intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(cpu_transcoder),
-			       VRR_DCB_ADJ_FLIPLINE(crtc_state->vrr.flipline - 1));
 		intel_de_write(display, TRANS_VRR_DCB_FLIPLINE(cpu_transcoder),
 			       VRR_DCB_FLIPLINE(crtc_state->vrr.flipline - 1));
 		intel_de_write(display, PIPEDMC_DCB_VMIN(pipe),
@@ -689,6 +687,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
 
 	if (crtc_state->vrr.dc_balance.enable) {
 		intel_dmc_configure_dc_balance_ctl_regs(display, pipe, true);
+		intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(cpu_transcoder),
+			       VRR_DCB_ADJ_FLIPLINE(crtc_state->vrr.flipline - 1));
 		intel_pipedmc_dcb_enable(NULL, crtc);
 	}
 }
-- 
2.48.1