June 2025 Archives by author

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Starting: Mon Jun 2 09:45:07 UTC 2025
Ending: Thu Jun 19 05:25:44 UTC 2025
Messages: 92

[PATCH 01/23] drm: AMD series squashed Chaitanya Kumar Borah
[PATCH 02/23] drm: Add support for 3x3 CTM Chaitanya Kumar Borah
[PATCH 03/23] drm: Add Enhanced LUT precision structure Chaitanya Kumar Borah
[PATCH 04/23] drm: Add Color lut range attributes Chaitanya Kumar Borah
[PATCH 05/23] drm: Add Color ops capability property Chaitanya Kumar Borah
[PATCH 06/23] drm: Add 1D LUT multi-segmented color op Chaitanya Kumar Borah
[PATCH 07/23] drm: Define helper to initialize segmented 1D LUT Chaitanya Kumar Borah
[PATCH 08/23] drm/i915: Add identifiers for intel color blocks Chaitanya Kumar Borah
[PATCH 09/23] drm/i915: Add intel_color_op Chaitanya Kumar Borah
[PATCH 10/23] drm/i915/color: Add helper to create intel colorop Chaitanya Kumar Borah
[PATCH 11/23] drm/i915/color: Create a transfer function color pipeline Chaitanya Kumar Borah
[PATCH 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property Chaitanya Kumar Borah
[PATCH 13/23] drm/i915/color: Add framework to program CSC Chaitanya Kumar Borah
[PATCH 14/23] drm/i915/color: Add callbacks to set plane CTM Chaitanya Kumar Borah
[PATCH 15/23] drm/i915/color: Add new color callbacks for Xelpd Chaitanya Kumar Borah
[PATCH 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond Chaitanya Kumar Borah
[PATCH 17/23] drm/i915: Add register definitions for Plane Degamma Chaitanya Kumar Borah
[PATCH 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT Chaitanya Kumar Borah
[PATCH 19/23] drm/i915: Add register definitions for Plane Post CSC Chaitanya Kumar Borah
[PATCH 20/23] drm/i915/color: Program Pre-CSC registers Chaitanya Kumar Borah
[PATCH 21/23] drm/i915/xelpd: Program Plane Post CSC Registers Chaitanya Kumar Borah
[PATCH 22/23] drm/i915/color: Enable Plane Color Pipelines Chaitanya Kumar Borah
[PATCH 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Chaitanya Kumar Borah
[PATCH 01/23] drm: AMD series squashed Chaitanya Kumar Borah
[PATCH 02/23] drm: Add support for 3x3 CTM Chaitanya Kumar Borah
[PATCH 03/23] drm: Add Enhanced LUT precision structure Chaitanya Kumar Borah
[PATCH 04/23] drm: Add Color lut range attributes Chaitanya Kumar Borah
[PATCH 05/23] drm: Add Color ops capability property Chaitanya Kumar Borah
[PATCH 06/23] drm: Add 1D LUT multi-segmented color op Chaitanya Kumar Borah
[PATCH 07/23] drm: Define helper to initialize segmented 1D LUT Chaitanya Kumar Borah
[PATCH 08/23] drm/i915: Add identifiers for intel color blocks Chaitanya Kumar Borah
[PATCH 09/23] drm/i915: Add intel_color_op Chaitanya Kumar Borah
[PATCH 10/23] drm/i915/color: Add helper to create intel colorop Chaitanya Kumar Borah
[PATCH 11/23] drm/i915/color: Create a transfer function color pipeline Chaitanya Kumar Borah
[PATCH 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property Chaitanya Kumar Borah
[PATCH 13/23] drm/i915/color: Add framework to program CSC Chaitanya Kumar Borah
[PATCH 14/23] drm/i915/color: Add callbacks to set plane CTM Chaitanya Kumar Borah
[PATCH 15/23] drm/i915/color: Add new color callbacks for Xelpd Chaitanya Kumar Borah
[PATCH 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond Chaitanya Kumar Borah
[PATCH 17/23] drm/i915: Add register definitions for Plane Degamma Chaitanya Kumar Borah
[PATCH 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT Chaitanya Kumar Borah
[PATCH 19/23] drm/i915: Add register definitions for Plane Post CSC Chaitanya Kumar Borah
[PATCH 20/23] drm/i915/color: Program Pre-CSC registers Chaitanya Kumar Borah
[PATCH 21/23] drm/i915/xelpd: Program Plane Post CSC Registers Chaitanya Kumar Borah
[PATCH 22/23] drm/i915/color: Enable Plane Color Pipelines Chaitanya Kumar Borah
[PATCH 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Chaitanya Kumar Borah
[PATCH v6 00/18] Enable/Disable DC balance along with VRR DSB Mitul Golani
[PATCH v6 01/18] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
[PATCH v6 02/18] drm/i915/display: Add source param for dc balance Mitul Golani
[PATCH v6 03/18] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
[PATCH v6 04/18] drm/i915/display: Add VRR DC balance registers Mitul Golani
[PATCH v6 05/18] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
[PATCH v6 06/18] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
[PATCH v6 07/18] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
[PATCH v6 08/18] drm/i915/vrr: Add compute config for DC Balance params Mitul Golani
[PATCH v6 09/18] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
[PATCH v6 10/18] drm/i915: Extract vrr_vblank_start() Mitul Golani
[PATCH v6 11/18] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
[PATCH v6 12/18] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
[PATCH v6 13/18] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
[PATCH v6 14/18] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
[PATCH v6 15/18] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
[PATCH v6 16/18] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
[PATCH v6 17/18] drm/i915/vrr: Move Adjustment flipline configuration Mitul Golani
[PATCH v6 18/18] drm/i915/vrr: Enable DC Balance bit Mitul Golani
[PATCH v6 00/18] Enable/Disable DC balance along with VRR DSB Mitul Golani
[PATCH v6 01/18] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
[PATCH v6 02/18] drm/i915/display: Add source param for dc balance Mitul Golani
[PATCH v6 03/18] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
[PATCH v6 04/18] drm/i915/display: Add VRR DC balance registers Mitul Golani
[PATCH v6 05/18] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
[PATCH v6 06/18] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
[PATCH v6 07/18] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
[PATCH v6 08/18] drm/i915/vrr: Add compute config for DC Balance params Mitul Golani
[PATCH v6 09/18] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
[PATCH v6 10/18] drm/i915: Extract vrr_vblank_start() Mitul Golani
[PATCH v6 11/18] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
[PATCH v6 12/18] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
[PATCH v6 13/18] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
[PATCH v6 14/18] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
[PATCH v6 15/18] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
[PATCH v6 16/18] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
[PATCH v6 17/18] drm/i915/vrr: Move Adjustment flipline configuration Mitul Golani
[PATCH v6 18/18] drm/i915/vrr: Enable DC Balance bit Mitul Golani
[PATCH i-g-t] tests/kms_async: On suspend/resume additional flip required Arun R Murthy
[PATCH 0/2] Add kernel param to limit the eDP rate to HBR2 Ankit Nautiyal
[PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
[PATCH 2/2] drm/i915/dp: Add kernel param to limit eDP rate to HBR2" Ankit Nautiyal
[PATCH] drm/i915/vdsc: Account for overhead bubbles in horizontal slices Ankit Nautiyal
[PATCH] drm/i915/vrr: Use optimized guardband Ankit Nautiyal
[PATCH] drm/i915/vrr: Use optimized guardband Ankit Nautiyal
[PATCH] drm/i915/colorspace: Add debugfs entry to read current colorspace Pranay Samala

Last message date: Thu Jun 19 05:25:44 UTC 2025
Archived on: Thu Jun 19 05:27:29 UTC 2025

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