[Intel-gfx] [PATCH] intel: Limit re-use cache size

Keith Packard keithp at keithp.com
Tue Dec 16 00:08:16 CET 2008


This limits reuse to 16MB per cache level to try and reduce application
memory consumption.

Signed-off-by: Keith Packard <keithp at keithp.com>
---
 libdrm/intel/intel_bufmgr_gem.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
index 4d1f7d1..5ba12a9 100644
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ b/libdrm/intel/intel_bufmgr_gem.c
@@ -1291,7 +1291,13 @@ drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr)
     int i;
 
     for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
-	bufmgr_gem->cache_bucket[i].max_entries = -1;
+	int max;
+
+	if (i > 12)
+	    max = 1;
+	else
+	    max = 4096 >> i;
+	bufmgr_gem->cache_bucket[i].max_entries = max;
     }
 }
 
-- 
1.5.6.5




More information about the Intel-gfx mailing list