[Intel-gfx] [PATCH] intel: Limit re-use cache size

[Eric Anholt]

On Mon, 2008-12-15 at 15:08 -0800, Keith Packard wrote:
> This limits reuse to 16MB per cache level to try and reduce application
> memory consumption.

Is 16MB based on any measurements at all?

I don't like this patch.  I'd prefer to have us figure out bugs that
make the cache grow overly large, and free old buffers (which we *still*
haven't done), instead of having static limits that'll just hide failure
so that you end up with both poor performance and excessive memory
consumption.

> Signed-off-by: Keith Packard <keithp at keithp.com>
> ---
>  libdrm/intel/intel_bufmgr_gem.c |    8 +++++++-
>  1 files changed, 7 insertions(+), 1 deletions(-)
> 
> diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
> index 4d1f7d1..5ba12a9 100644
> --- a/libdrm/intel/intel_bufmgr_gem.c
> +++ b/libdrm/intel/intel_bufmgr_gem.c
> @@ -1291,7 +1291,13 @@ drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr)
>      int i;
>  
>      for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
> -	bufmgr_gem->cache_bucket[i].max_entries = -1;
> +	int max;
> +
> +	if (i > 12)
> +	    max = 1;
> +	else
> +	    max = 4096 >> i;
> +	bufmgr_gem->cache_bucket[i].max_entries = max;
>      }
>  }
>  
-- 
Eric Anholt
eric at anholt.net                         eric.anholt at intel.com


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