[Intel-gfx] [PATCH 1/2] drm/i915: Add error state to debugfs

[Ben Gamari]

This is the just the error dumping portion of jbarnes' error detection and
reporting patch (sent out on Mon, 20 Apr 2009 15:38:01 -0700).
---
 drivers/gpu/drm/i915/i915_gem_debugfs.c |   40 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h         |   11 ++++++++
 2 files changed, 51 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
index 28146e4..da4e80d 100644
--- a/drivers/gpu/drm/i915/i915_gem_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
@@ -323,6 +323,45 @@ static int i915_ringbuffer_info(struct seq_file *m, void *data)
 	return 0;
 }
 
+static int i915_error_state(struct seq_file *m, void *unused)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	u32 eir = I915_READ(EIR);
+
+	seq_printf(m, "ESR: 0x%08x\n", I915_READ(ESR));
+	seq_printf(m, "EMR: 0x%08x\n", I915_READ(EMR));
+	seq_printf(m, "EIR: 0x%08x\n", I915_READ(EIR));
+	if (eir & I915_ERROR_PAGE_TABLE) {
+		seq_printf(m, "  page table error\n");
+	}
+	if (eir & I915_ERROR_MEMORY_REFRESH) {
+		seq_printf(m, "  memory refresh error\n");
+	}
+	if (eir & I915_ERROR_INSTRUCTION) {
+		seq_printf(m, "  instruction error\n");
+	}
+	seq_printf(m, "  PGTBL_ER: 0x%08x\n", I915_READ(PGTBL_ER));
+	seq_printf(m, "  INSTPM: 0x%08x\n", I915_READ(INSTPM));
+	if (!IS_I965G(dev)) {
+		seq_printf(m, "  IPEIR: 0x%08x\n", I915_READ(IPEIR));
+		seq_printf(m, "  IPEHR: 0x%08x\n", I915_READ(IPEHR));
+		seq_printf(m, "  INSTDONE: 0x%08x\n", I915_READ(INSTDONE));
+		seq_printf(m, "  ACTHD: 0x%08x\n", I915_READ(ACTHD));
+	} else {
+		seq_printf(m, "  IPEIR: 0x%08x\n", I915_READ(IPEIR_I965));
+		seq_printf(m, "  IPEHR: 0x%08x\n", I915_READ(IPEHR_I965));
+		seq_printf(m, "  INSTDONE: 0x%08x\n",
+			   I915_READ(INSTDONE_I965));
+		seq_printf(m, "  INSTPS: 0x%08x\n", I915_READ(INSTPS));
+		seq_printf(m, "  INSTDONE1: 0x%08x\n", I915_READ(INSTDONE1));
+		seq_printf(m, "  ACTHD: 0x%08x\n", I915_READ(ACTHD_I965));
+	}
+
+	return 0;
+}
+
 
 static struct drm_info_list i915_gem_debugfs_list[] = {
 	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
@@ -336,6 +375,7 @@ static struct drm_info_list i915_gem_debugfs_list[] = {
 	{"i915_ringbuffer_data", i915_ringbuffer_data, 0},
 	{"i915_ringbuffer_info", i915_ringbuffer_info, 0},
 	{"i915_batchbuffers", i915_batchbuffer_info, 0},
+	{"i915_error_state", i915_error_state, 0},
 };
 #define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list)
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 88bf752..9f645c1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -206,6 +206,7 @@
 /*
  * Instruction and interrupt control regs
  */
+#define PGTBL_ER	0x02024
 #define PRB0_TAIL	0x02030
 #define PRB0_HEAD	0x02034
 #define PRB0_START	0x02038
@@ -226,11 +227,18 @@
 #define PRB1_HEAD	0x02044 /* 915+ only */
 #define PRB1_START	0x02048 /* 915+ only */
 #define PRB1_CTL	0x0204c /* 915+ only */
+#define IPEIR_I965	0x02064
+#define IPEHR_I965	0x02068
+#define INSTDONE_I965	0x0206c
+#define INSTPS		0x02070 /* 965+ only */
+#define INSTDONE1	0x0207c /* 965+ only */
 #define ACTHD_I965	0x02074
 #define HWS_PGA		0x02080
 #define HWS_ADDRESS_MASK	0xfffff000
 #define HWS_START_ADDRESS_SHIFT	4
 #define IPEIR		0x02088
+#define IPEHR		0x0208c
+#define INSTDONE	0x02090
 #define NOPID		0x02094
 #define HWSTAM		0x02098
 #define SCPD0		0x0209c /* 915+ only */
@@ -258,6 +266,9 @@
 #define EIR		0x020b0
 #define EMR		0x020b4
 #define ESR		0x020b8
+#define   I915_ERROR_PAGE_TABLE				(1<<4)
+#define   I915_ERROR_MEMORY_REFRESH			(1<<1)
+#define   I915_ERROR_INSTRUCTION			(1<<0)
 #define INSTPM	        0x020c0
 #define ACTHD	        0x020c8
 #define FW_BLC		0x020d8
-- 
1.6.3.3