[Intel-gfx] xf86-video-intel: src/i830.h src/i830_hwmc.c src/i830_memory.c src/i915_hwmc.c

Zhenyu Wang zhenyuw at linux.intel.com
Mon Jul 27 05:11:55 CEST 2009


On 2009.07.27 09:58:23 +0800, Xiang, Haihao wrote:
> > 
> > Pinning is a privileged operation, is there some other way of fixing
> > XvMC so that you don't need to pin?
> > 
> Allocate XvMC surfaces in XvMC library other than in DDX driver. 

yeah, I was thinking we should have done that when moving to gem for XvMC,
but 915ish is ignored.

> 
> However 915/915GM requires physical address for XvMC surfaces (although
> XvMC is disabled on 915/915GM under KMS, it is enabled under UMS),
> currently DRM/GEM can't handle physical address which means we have to
> use legacy way for 915/915GM (and I dislike using two paths for XvMC
> surfaces in XvMC library).
> 

Extend exec_buf for physical address based relocation is the way to go
I think. Although newer chips have already abandon phys address, this
would only be for legacy devices.

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 197 bytes
Desc: Digital signature
URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20090727/88c566cd/attachment.sig>


More information about the Intel-gfx mailing list