[Intel-gfx] xf86-video-intel: src/i830.h src/i830_hwmc.c src/i830_memory.c src/i915_hwmc.c
Eric Anholt
eric at anholt.net
Mon Jul 27 05:28:23 CEST 2009
On Mon, 2009-07-27 at 11:11 +0800, Zhenyu Wang wrote:
> On 2009.07.27 09:58:23 +0800, Xiang, Haihao wrote:
> > >
> > > Pinning is a privileged operation, is there some other way of fixing
> > > XvMC so that you don't need to pin?
> > >
> > Allocate XvMC surfaces in XvMC library other than in DDX driver.
>
> yeah, I was thinking we should have done that when moving to gem for XvMC,
> but 915ish is ignored.
>
> >
> > However 915/915GM requires physical address for XvMC surfaces (although
> > XvMC is disabled on 915/915GM under KMS, it is enabled under UMS),
> > currently DRM/GEM can't handle physical address which means we have to
> > use legacy way for 915/915GM (and I dislike using two paths for XvMC
> > surfaces in XvMC library).
> >
>
> Extend exec_buf for physical address based relocation is the way to go
> I think. Although newer chips have already abandon phys address, this
> would only be for legacy devices.
Agreed on that being the right way to handle this.
--
Eric Anholt
eric at anholt.net eric.anholt at intel.com
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