[Intel-gfx] [PATCH V2] Wait double buffered register to be stable for load pipe detection

[Ma, Ling]

hi Carl

Any comments about this patch ?  We have tested this pach on 915G and 915GM, no regression on them.

Thanks
Ma Ling  

>-----Original Message-----
>From: intel-gfx-bounces at lists.freedesktop.org 
>[mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of Ma Ling
>Sent: Friday, May 15, 2009 3:32 PM
>To: intel-gfx at lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH V2] Wait double buffered 
>register to be stable for load pipe detection
>
>We have two approaches for VGA detections: hot plug detection 
>for 945G onwards
>and load pipe detection for Pre-945G. load pipe detection will 
>get one free
>pipe ,and set border color as red and blue, then check CRT status by
>swf register. Because pipe registers in hires mode are double buffered,
>once set force border bit in pipeconf register, we have to 
>wait for      
>a vblank until it is effective, otherwise result is unstable.
>
>It fixed freedesktop bug #20463
>
>
>Signed-off-by: Ma Ling <ling.ma at intel.com>
>---
>Current KMS don't implement load pipe detection, it is next work.
>
> src/i830_crt.c |    3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
>diff --git a/src/i830_crt.c b/src/i830_crt.c
>index d8e4a76..ee31770 100644
>--- a/src/i830_crt.c
>+++ b/src/i830_crt.c
>@@ -286,7 +286,8 @@ i830_crt_detect_load (xf86CrtcPtr	    crtc,
>     {
> 	uint32_t	pipeconf = INREG(pipeconf_reg);
> 	OUTREG(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
>-	
>+        /* Wait for next Vblank to substitue border color for 
>Color info */
>+        i830WaitForVblank (pScrn);
> 	st00 = pI830->readStandard (pI830, 0x3c2);
> 	present = (st00 & (1 << 4)) != 0;
> 	OUTREG(pipeconf_reg, pipeconf);
>-- 
>1.5.4.4
>
>
>
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