[Intel-gfx] [PATCH] drm/i915: Disable FDI link before retraining.
Chris Wilson
chris at chris-wilson.co.uk
Tue Aug 3 09:12:12 CEST 2010
At the moment, we have a habit of occasionally performing a double dpms
on. This confuses the FDI link training performed on a dpms on as we can
only adjust the settings whilst the link is disabled and the second
attempt at training fails. A simple defensive workaround is to always
disable the link prior to adjustment and re-enabling on dpms on.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index be81483..e9da266 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1897,6 +1897,14 @@ static int ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
/* enable eDP PLL */
ironlake_enable_pll_edp(crtc);
} else {
+ /* unlock the FDI registers for retraining */
+ temp = I915_READ(fdi_tx_reg);
+ if (temp & FDI_TX_ENABLE)
+ I915_WRITE(fdi_tx_reg, temp & ~FDI_TX_ENABLE);
+
+ temp = I915_READ(fdi_rx_reg);
+ if (temp & FDI_RX_ENABLE)
+ I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE);
/* enable PCH FDI RX PLL, wait warmup plus DMI latency */
temp = I915_READ(fdi_rx_reg);
--
1.7.1
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