[Intel-gfx] [PATCH 1/2] drm/i915: avoid reading non-existent PLL reg on Ironlake+

[Jesse Barnes]

These functions need to be reworked for Ironlake and above, but until
then at least avoid reading non-existent registers.

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e7e7b8a..6313076 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5042,11 +5042,12 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int pipe = intel_crtc->pipe;
 	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
-	int dpll = I915_READ(dpll_reg);
+	int dpll;
 
 	if (HAS_PCH_SPLIT(dev))
 		return;
 
+	dpll = I915_READ(dpll_reg);
 	if (!dev_priv->lvds_downclock_avail)
 		return;
 
-- 
1.7.0.4