[Intel-gfx] [regression] drm/i915: Flush pending writes on i830/i845 after updating GTT
Chris Wilson
chris at chris-wilson.co.uk
Thu Dec 30 19:06:20 CET 2010
Ok, understood my mistake, that line was indeed incorrect.
Thanks,
-Chris
commit dc3bfebcf77d943b7e8495d30d0ee3d01b3042a5
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu Dec 30 18:02:21 2010 +0000
drm/i915: Don't skip ring flushes if only invalidating
Commit 15056d2 tried to optimize away a flush if there were no
outstanding writes on a ring (in order to prevent a too-early-flush
during ring init). However, this has the unfortunate side-effect of
eliminating the texture cache invalidation, and so causing rendering
artefacts.
Reported-by: Alexey Fisher <bug-track at fisher-privat.net>
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
--
Chris Wilson, Intel Open Source Technology Centre
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