[Intel-gfx] [PATCH] drm/i915: Seperate fence pin counting from normal bind pin counting

[Chris Wilson]

On Sat, 09 Jul 2011 12:23:02 +0200, Paul Menzel <paulepanter at users.sourceforge.net> wrote:
> Am Samstag, den 09.07.2011, 09:25 +0100 schrieb Chris Wilson:
> 
> Whoever pushes this, please correct
> 
> s/Seperate/Separate/
> 
> in the commit summary.

Yes, I forgot to fix the typo again.

> 
> > In order to correctly account for reserving space in the GTT and fences
> > for a batch buffer, we need to independently track whether the fence is
> > pinned due to a fenced GPU access in the batch from from whether the
> > buffer is pinned in the aperture. Currently we count the fenced as
> 
> »the fenced« sounds strange. Probably I need to read up the code to
> grasp that. Or is the »d« at the end a typo?

I was probably thinking of a fenced bo at the time, but the sentence reads
correctly with s/fenced/fence/.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre