[Intel-gfx] [PATCH 2/3] drm/i915: Rename HDMI register field definitions
przanoni at gmail.com
przanoni at gmail.com
Fri Oct 14 23:17:09 CEST 2011
From: Paulo Zanoni <paulo.r.zanoni at intel.com>
Also making the differences between HDMI{B,C,D} and SDVO registers for
non-PCH, IBX and CPT more explicit.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 49 ++++++++++++++++++++--------------
drivers/gpu/drm/i915/intel_display.c | 16 ++++++-----
drivers/gpu/drm/i915/intel_hdmi.c | 6 ++--
drivers/gpu/drm/i915/intel_sdvo.c | 5 ++-
4 files changed, 44 insertions(+), 32 deletions(-)
As discussed on IRC
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e02b64c..8fdee99 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3272,27 +3272,36 @@
#define ADPA_CRT_HOTPLUG_VOLREF_475MV (1<<17)
#define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16)
-/* or SDVOB */
+/*
+ * - Fields named "HDMI" are present for HDMI{B,C,D}
+ * - Fields named "PCH_SDVO" are present only for HDMIB (aka PCH_SDVOB or
+ * SDVO_HDMI_CTL on newer chips). Some of them, not all, are compatible with
+ * the old SDVO registers (SDVOB, SDVOC)
+ * - Fields valid only for IBX have the _IBX suffix
+ * - Fields valid only for CPT (and newer?) have the _CPT suffix
+ */
#define HDMIB 0xe1140
-#define PORT_ENABLE (1 << 31)
-#define TRANSCODER(pipe) ((pipe) << 30)
-#define TRANSCODER_CPT(pipe) ((pipe) << 29)
-#define TRANSCODER_MASK (1 << 30)
-#define TRANSCODER_MASK_CPT (3 << 29)
-#define COLOR_FORMAT_8bpc (0)
-#define COLOR_FORMAT_12bpc (3 << 26)
-#define SDVOB_HOTPLUG_ENABLE (1 << 23)
-#define SDVO_ENCODING (0)
-#define TMDS_ENCODING (2 << 10)
-#define NULL_PACKET_VSYNC_ENABLE (1 << 9)
-/* CPT */
-#define HDMI_MODE_SELECT (1 << 9)
-#define DVI_MODE_SELECT (0)
-#define SDVOB_BORDER_ENABLE (1 << 7)
-#define AUDIO_ENABLE (1 << 6)
-#define VSYNC_ACTIVE_HIGH (1 << 4)
-#define HSYNC_ACTIVE_HIGH (1 << 3)
-#define PORT_DETECTED (1 << 2)
+#define HDMI_PORT_ENABLE (1 << 31)
+#define HDMI_TRANSCODER_IBX(pipe) ((pipe) << 30)
+#define HDMI_TRANSCODER_CPT(pipe) ((pipe) << 29)
+#define HDMI_TRANSCODER_MASK_IBX (1 << 30)
+#define HDMI_TRANSCODER_MASK_CPT (3 << 29)
+#define HDMI_COLOR_FORMAT_8bpc (0 << 26)
+#define HDMI_COLOR_FORMAT_12bpc (3 << 26)
+#define HDMI_COLOR_MASK (7 << 26)
+#define PCH_SDVO_STALL_SELECT_IBX SDVO_STALL_SELECT
+#define PCH_SDVO_STALL_SELECT_CPT (1 << 25)
+#define PCH_SDVO_HOTPLUG_INT_ENABLE (1 << 23)
+#define PCH_SDVO_ENCODING_SDVO SDVO_ENCODING_SDVO
+#define PCH_SDVO_ENCODING_TMDS SDVO_ENCODING_HDMI
+#define PCH_SDVO_ENCODING_MASK (3 << 10)
+#define HDMI_MODE_DVI (0 << 9)
+#define HDMI_MODE_HDMI SDVO_NULL_PACKETS_DURING_VSYNC
+#define PCH_SDVO_BORDER_ENABLE SDVO_BORDER_ENABLE
+#define HDMI_AUDIO_ENABLE SDVO_AUDIO_ENABLE
+#define HDMI_VSYNC_ACTIVE_HIGH SDVO_VSYNC_ACTIVE_HIGH
+#define HDMI_HSYNC_ACTIVE_HIGH SDVO_HSYNC_ACTIVE_HIGH
+#define HDMI_PORT_DETECTED SDVO_DETECTED
/* PCH SDVOB multiplex with HDMIB */
#define PCH_SDVOB HDMIB
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f0e5f9f..d18db3b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1002,14 +1002,16 @@ static bool dp_pipe_enabled(struct drm_i915_private *dev_priv,
static bool hdmi_pipe_enabled(struct drm_i915_private *dev_priv,
enum pipe pipe, u32 val)
{
- if ((val & PORT_ENABLE) == 0)
+ if ((val & HDMI_PORT_ENABLE) == 0)
return false;
if (HAS_PCH_CPT(dev_priv->dev)) {
- if ((val & PORT_TRANS_SEL_MASK) != PORT_TRANS_SEL_CPT(pipe))
+ if ((val & HDMI_TRANSCODER_MASK_CPT) !=
+ HDMI_TRANSCODER_CPT(pipe))
return false;
} else {
- if ((val & TRANSCODER_MASK) != TRANSCODER(pipe))
+ if ((val & HDMI_TRANSCODER_MASK_IBX) !=
+ HDMI_TRANSCODER_IBX(pipe))
return false;
}
return true;
@@ -1421,7 +1423,7 @@ static void disable_pch_hdmi(struct drm_i915_private *dev_priv,
if (hdmi_pipe_enabled(dev_priv, val, pipe)) {
DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n",
reg, pipe);
- I915_WRITE(reg, val & ~PORT_ENABLE);
+ I915_WRITE(reg, val & ~HDMI_PORT_ENABLE);
}
}
@@ -7292,7 +7294,7 @@ static void intel_setup_outputs(struct drm_device *dev)
if (HAS_PCH_SPLIT(dev)) {
int found;
- if (I915_READ(HDMIB) & PORT_DETECTED) {
+ if (I915_READ(HDMIB) & HDMI_PORT_DETECTED) {
/* PCH SDVOB multiplex with HDMIB */
found = intel_sdvo_init(dev, PCH_SDVOB);
if (!found)
@@ -7301,10 +7303,10 @@ static void intel_setup_outputs(struct drm_device *dev)
intel_dp_init(dev, PCH_DP_B);
}
- if (I915_READ(HDMIC) & PORT_DETECTED)
+ if (I915_READ(HDMIC) & HDMI_PORT_DETECTED)
intel_hdmi_init(dev, HDMIC);
- if (I915_READ(HDMID) & PORT_DETECTED)
+ if (I915_READ(HDMID) & HDMI_PORT_DETECTED)
intel_hdmi_init(dev, HDMID);
if (I915_READ(PCH_DP_C) & DP_DETECTED)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 75026ba..27e7ebf 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -236,13 +236,13 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
if (intel_crtc->bpp > 24)
- sdvox |= COLOR_FORMAT_12bpc;
+ sdvox |= HDMI_COLOR_FORMAT_12bpc;
else
- sdvox |= COLOR_FORMAT_8bpc;
+ sdvox |= HDMI_COLOR_FORMAT_8bpc;
/* Required on CPT */
if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
- sdvox |= HDMI_MODE_SELECT;
+ sdvox |= HDMI_MODE_HDMI;
if (intel_hdmi->has_audio) {
DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 85fc976..2c31c0d 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1082,9 +1082,10 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
}
if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
- sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
+ sdvox |= HDMI_TRANSCODER_CPT(intel_crtc->pipe);
else
- sdvox |= TRANSCODER(intel_crtc->pipe);
+ /* works for IBX and non-PCH */
+ sdvox |= HDMI_TRANSCODER_IBX(intel_crtc->pipe);
if (intel_sdvo->has_hdmi_audio)
sdvox |= SDVO_AUDIO_ENABLE;
--
1.7.6.3
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