[Intel-gfx] [PATCH 1/4] drm/i915: disable turbo on ValleyView for now
Jesse Barnes
jbarnes at virtuousgeek.org
Wed Apr 11 18:23:33 CEST 2012
We'll probably need new init functions and will need to test it.
v2: fix impossible GEN6 && GEN7 condition, move to Daniel's new init function
Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aee389c..58f4b02 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9541,7 +9541,7 @@ void intel_modeset_init_hw(struct drm_device *dev)
intel_init_emon(dev);
}
- if (IS_GEN6(dev) || IS_GEN7(dev)) {
+ if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
gen6_enable_rps(dev_priv);
gen6_update_ring_freq(dev_priv);
}
@@ -9632,7 +9632,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
if (IS_IRONLAKE_M(dev))
ironlake_disable_drps(dev);
- if (IS_GEN6(dev) || IS_GEN7(dev))
+ if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev))
gen6_disable_rps(dev);
if (IS_IRONLAKE_M(dev))
--
1.7.4.1
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