[Intel-gfx] [PATCH v4] drm/i915: rc6 in sysfs

[Daniel Vetter]

On Wed, Apr 11, 2012 at 11:10:05PM +0100, Chris Wilson wrote:
> On Wed, 11 Apr 2012 09:14:43 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> > I'm down to just bikeshedding over useless lines of code which do not
> > even add visual clarity...
> > 
> > Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> 
> Oops, need to learn to spot 64-bit divides which become an issue on
> 32-bit builds.

Squashed onto Ben's patch and updated dinq pushed.

Thanks, Daniel
> 
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 2319f06..f1b5108 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -35,14 +35,12 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	u64 raw_time; /* 32b value may overflow during fixed point math */
> -	u32 residency;
>  
>  	if (!intel_enable_rc6(dev))
>  		return 0;
>  
> -	raw_time = I915_READ(reg) * 128ULL;
> -	residency = DIV_ROUND_CLOSEST(raw_time, 1000) / 100;
> -	return residency;
> +	raw_time = I915_READ(reg) * 128ULL + 500;
> +	return do_div(raw_time, 100000);
>  }
>  
>  static ssize_t
> -- 
> 1.7.9.5
> 
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48