[Intel-gfx] [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell

[Daniel Vetter]

On Fri, Apr 13, 2012 at 05:08:51PM -0300, Eugeni Dodonov wrote:
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0768f48..e4ebd39 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1437,8 +1437,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
>  	/* PCH only available on ILK+ */
>  	BUG_ON(dev_priv->info->gen < 5);
>  
> -	/* Make sure PCH DPLL is enabled */
> -	assert_pch_pll_enabled(dev_priv, pipe);
> +	/* Make sure PCH DPLL is enabled on Pre-Haswell platforms */
> +	if (!IS_HASWELL(dev_priv->dev))
> +		assert_pch_pll_enabled(dev_priv, pipe);

If I read the code correctly, you can drop this one with the follow-up
patch to correctly detect which ports are driven through the pch in
intel_crtc_driving_pch. I'm having a feeling there are other places where
we should exploit this and could drop an IS_HSW check, but I'm too tired
to check right now ;-)
-Daniel

>  
>  	/* FDI must be feeding us bits for PCH ports */
>  	assert_fdi_tx_enabled(dev_priv, pipe);
> -- 
> 1.7.10
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48