[Intel-gfx] [PATCH 2/2] drm/i915: Force TLB invalidation for erratum on 830/845 BLT

[Daniel Vetter]

On Mon, Apr 16, 2012 at 09:53:17AM +0100, Chris Wilson wrote:
> On 830/845, the BLT unit invalidates the wrong PTE in its TLB after the
> GATT is updated. A simple solution is then to always invalidate the TLB
> of the BLT prior to each execbuffer.
> 
> This does appear to improve the stability slighty, but I am still seeing
> spurious GPU deaths under memory pressure.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=26345
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

In the light of the eventual gpu domain tracking removal, can't we just
unconditionally set these bit in the new gen2_render_ring_flush function?
Or is it indeed to expensive?
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 60fc132..b825c06 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -883,6 +883,13 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
>  	int ret;
>  
>  	memset(&cd, 0, sizeof(cd));
> +
> +	/* We need to invalidate the BLT's prefetched entries after
> +	 * updating the GATT (as the hardware invalidates the wrong PTEs).
> +	 */
> +	if (IS_I830(ring->dev) || IS_845G(ring->dev))
> +		cd.invalidate_domains = I915_GEM_DOMAIN_RENDER;
> +
>  	list_for_each_entry(obj, objects, exec_list)
>  		i915_gem_object_set_to_gpu_domain(obj, ring, &cd);
>  
> -- 
> 1.7.10
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48