[Intel-gfx] [PATCH] drm/i915: Replace open coded MI_BATCH_GTT
daniel at ffwll.ch
Wed Apr 18 11:11:32 CEST 2012
On Tue, Apr 17, 2012 at 04:38:12PM +0100, Chris Wilson wrote:
> The (2<<6) virtual memory space selector harks back to gen3 and is
> mandatory given our use of GTT space for batchbuffers. On gen4+, use of
> the GTT became mandatory and bit6 marked reserved. However the code must
> now explicitly set (1<<7), which conveniently is also (2<<6).
> To clarify the meaning for future readers, replace the open coded (2<<6)
> with MI_BATCH_GTT.
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Queued for -next, thanks for the patch.
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx