[Intel-gfx] [PATCH] drm/i915: manage PCH PLLs separately from pipes

[Jesse Barnes]

On Fri, 13 Apr 2012 18:24:38 +0100
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> From: Jesse Barnes <jbarnes at virtuousgeek.org>
> 
> PCH PLLs aren't required for outputs on the CPU, so we shouldn't just
> treat them as part of the pipe.
> 
> So split the code out and manage PCH PLLs separately, allocating them
> when needed or trying to re-use existing PCH PLL setups when the timings
> match.
> 
> v2: add num_pch_pll field to dev_priv (Daniel)
>     don't NULL the pch_pll pointer in disable or DPMS will fail (Jesse)
>     put register offsets in pll struct (Chris)
> 
> v3: Decouple enable/disable of PLLs from get/put.
> 
> Fixes https://bugs.freedesktop.org/show_bug.cgi?id=44309
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---

I think this one can be applied.  I still have a mode setting issue,
but this patch at least lets me see the error rather than hiding it
behind an -EINVAL.

Any my issue could be due to some early hardware anyway; I'll verify
once I get my upgrade.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center