[Intel-gfx] [PATCH] drm/i915: manage PCH PLLs separately from pipes

Daniel Vetter daniel at ffwll.ch
Wed Apr 18 23:36:08 CEST 2012

On Fri, Apr 13, 2012 at 06:24:38PM +0100, Chris Wilson wrote:
> From: Jesse Barnes <jbarnes at virtuousgeek.org>
> PCH PLLs aren't required for outputs on the CPU, so we shouldn't just
> treat them as part of the pipe.
> So split the code out and manage PCH PLLs separately, allocating them
> when needed or trying to re-use existing PCH PLL setups when the timings
> match.
> v2: add num_pch_pll field to dev_priv (Daniel)
>     don't NULL the pch_pll pointer in disable or DPMS will fail (Jesse)
>     put register offsets in pll struct (Chris)
> v3: Decouple enable/disable of PLLs from get/put.
> Fixes https://bugs.freedesktop.org/show_bug.cgi?id=44309
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Patch applied to dinq with Jesse's irc reviewed-by and tested-by, thanks
for the patch.
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48

More information about the Intel-gfx mailing list