[Intel-gfx] [PATCH] drm/i915: Use the correct size of the GTT for placing the per-process entries

[Daniel Vetter]

On Fri, Aug 24, 2012 at 09:12:22AM +0100, Chris Wilson wrote:
> The current layout is to place the per-process tables at the end of the
> GTT. However, this is currently using a hardcoded maximum size for the GTT
> and not taking in account limitations imposed by the BIOS. Use the value
> for the total number of entries allocated in the table as provided by
> the configuration registers.
> 
> Reported-by: Matthew Garrett <mjg at redhat.com>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Ben Widawsky <ben at bwidawsk.net>
> Cc: Matthew Garret <mjg at redhat.com>
Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48