[Intel-gfx] [PATCH] drm/i915: enable sdvo interrupt on pch platforms

Daniel Vetter daniel at ffwll.ch
Mon Dec 10 22:29:59 CET 2012


On Mon, Dec 10, 2012 at 01:20:29PM -0800, Jesse Barnes wrote:
> On Mon, 10 Dec 2012 01:37:18 +0100
> Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> 
> > Noticed while strolling through docs. Might make a few dual-link dvi
> > users happy(ier).
> > 
> > v2: Remove the unrelated debug hacks in intel_display.c
> > 
> > v3: Preserve register contexts to not upset fastboot or the modeset
> > hw state checker.
> > 
> > v4: Actually enable it in the irq handler/postinstall functions, too
> > 
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c   |  3 +++
> >  drivers/gpu/drm/i915/i915_reg.h   |  6 ++++--
> >  drivers/gpu/drm/i915/intel_sdvo.c | 14 +++++++++++++-
> >  3 files changed, 20 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index d02e022..e9b9460 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1910,6 +1910,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
> >  				SDE_PORTB_HOTPLUG_CPT |
> >  				SDE_PORTC_HOTPLUG_CPT |
> >  				SDE_PORTD_HOTPLUG_CPT |
> > +				SDE_SDVOB_HOTPLUG_CPT |
> >  				SDE_GMBUS_CPT |
> >  				SDE_AUX_MASK_CPT);
> >  	} else {
> > @@ -1917,6 +1918,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
> >  				SDE_PORTB_HOTPLUG |
> >  				SDE_PORTC_HOTPLUG |
> >  				SDE_PORTD_HOTPLUG |
> > +				SDE_SDVOB_HOTPLUG |
> >  				SDE_GMBUS |
> >  				SDE_AUX_MASK);
> >  	}
> > @@ -1979,6 +1981,7 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
> >  			SDE_PORTB_HOTPLUG_CPT |
> >  			SDE_PORTC_HOTPLUG_CPT |
> >  			SDE_PORTD_HOTPLUG_CPT |
> > +			SDE_SDVOB_HOTPLUG_CPT |
> >  			SDE_GMBUS_CPT |
> >  			SDE_AUX_MASK_CPT);
> >  	dev_priv->pch_irq_mask = ~hotplug_mask;
> 
> I guess this needs fixing on top of your latest hotplug setup changes.

Yep.

> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index f2a5ea6..d8162f8 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1673,7 +1673,7 @@
> >  #define   SDVO_ENABLE		(1 << 31)
> >  #define   SDVO_PIPE_B_SELECT	(1 << 30)
> >  #define   SDVO_STALL_SELECT	(1 << 29)
> > -#define   SDVO_INTERRUPT_ENABLE	(1 << 26)
> > +#define   SDVO_INTERRUPT_ENABLE_PCH	(1 << 23)
> 
> Why drop the old one?  Not possible to use there too?

Afaics it's totally bogus - bits 26 is reserved for the color depth
selection. I've done a bit of docs scrounging and apparently we only need
to enable the sdvo irq manually in the port reg on ilk+.

> > @@ -1085,6 +1085,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
> >  	if (!mode)
> >  		return;
> >  
> > +	/* Preserve the PCH interrupt enable bit. */
> > +	sdvox = I915_READ(intel_sdvo->sdvo_reg) & SDVO_INTERRUPT_ENABLE_PCH;
> > +
> 
> Don't we unconditionally set sdvox later?  Do you need to add some
> s/=/|=/ later on in sdvo_mode_set?

Yeah, noticed that too but forgot to fix it up.

> >  	/* First, set the input mapping for the first input to our controlled
> >  	 * output. This is only correct if we're a single-input device, in
> >  	 * which case the first input is the output from the appropriate SDVO
> > @@ -2775,9 +2778,18 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
> >  	/* Only enable the hotplug irq if we need it, to work around noisy
> >  	 * hotplug lines.
> >  	 */
> > -	if (intel_sdvo->hotplug_active)
> > +	if (intel_sdvo->hotplug_active) {
> >  		dev_priv->hotplug_supported_mask |= hotplug_mask;
> >  
> > +		if (HAS_PCH_SPLIT(dev)) {
> > +			u32 temp;
> > +
> > +			temp = I915_READ(intel_sdvo->sdvo_reg);
> > +			temp &= SDVO_INTERRUPT_ENABLE_PCH;
> > +			intel_sdvo_write_sdvox(intel_sdvo, temp);
> > +		}
> > +	}
> 
> Clearing everything but the interrupt enable bit?  Or should this be |=?

By now you should have noticed that this is a massive [CFT] hoax ... I
guess I need to plug an sdvo in my ivb here ;-)
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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