[Intel-gfx] [PATCH 2/3] drm/i915: consolidate swizzling control bit frobbing

Ben Widawsky ben at bwidawsk.net
Wed Feb 1 22:37:29 CET 2012

On Tue, Jan 31, 2012 at 04:47:55PM +0100, Daniel Vetter wrote:
> On gen5 we also need to correctly set up swizzling in the display
> scanout engine, but only there. Consolidate this into the same
> function.
> This has a small effect on ums setups - the kernel now also sets this
> bit in addition to userspace setting it. Given that this code only
> runs when userspace either can't (resume, gpu reset) or explicitly
> won't(gem_init) touch the hw this shouldn't have an adverse effect.
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---

Have you tested this well?
>From bspec:
Note: For ILK Display Engine can(?) implement the A[6] swizzling
structure however it will not be used – corresponding bits will be set
to “00”

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