[Intel-gfx] [PATCH 2/3] drm/i915: consolidate swizzling control bit frobbing
Daniel Vetter
daniel at ffwll.ch
Wed Feb 1 23:23:09 CET 2012
On Wed, Feb 01, 2012 at 01:37:29PM -0800, Ben Widawsky wrote:
> On Tue, Jan 31, 2012 at 04:47:55PM +0100, Daniel Vetter wrote:
> > On gen5 we also need to correctly set up swizzling in the display
> > scanout engine, but only there. Consolidate this into the same
> > function.
> >
> > This has a small effect on ums setups - the kernel now also sets this
> > bit in addition to userspace setting it. Given that this code only
> > runs when userspace either can't (resume, gpu reset) or explicitly
> > won't(gem_init) touch the hw this shouldn't have an adverse effect.
> >
> > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
>
> Have you tested this well?
> From bspec:
> Note: For ILK Display Engine can(?) implement the A[6] swizzling
> structure however it will not be used – corresponding bits will be set
> to “00”
I've simply moved the check around and my and checked whether I haven't
broken things. But resetting that bit seriously creates swizzling havoc on
my screen, so I think it's required ;-)
Cheers, Daniel
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx
mailing list