[Intel-gfx] [PATCH] drm/modes: do not enforce an odd vtotal for interlaced modes

Dave Airlie airlied at gmail.com
Fri Feb 3 10:37:47 CET 2012

On Fri, Jan 27, 2012 at 9:40 PM, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> CEA actually specifies an interlaced mode with even vtotal and
> supplies a diagram showing how this is supposed to work.
> Note that interlaced modes with an even vtotal seem to be a fairly
> recent invention. All modelines lore I could dig up with googling says
> that vtotal for interlaced modes _needs_ to be odd. But the even
> modelines in CEA are not a spec-bug, there's a figure in CEA-861-E
> called "Figure 5 Special Interlaced Video Format Timing (Even Vtotal)"
> that explains how it's supposed to work. Furthermore intel Bspec
> explicitly mentions that both odd and even interlaced vtotal are
> supported (VTOTAL register in the south display engine of PCH split
> chips).
> Cc: Adam Jackson <ajax at redhat.com>
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---

Ajax? I'd like your ack/review on this.


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