[Intel-gfx] [PATCH 3/5] drm/i915: implement SNB workaround for lazy global gtt

Chris Wilson chris at chris-wilson.co.uk
Thu Feb 16 00:10:08 CET 2012

On Wed, 15 Feb 2012 23:50:23 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> +	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
> +	 * pipe_control writes because the gpu doesn't properly redirect them
> +	 * through the ppgtt for non_secure batchbuffers. */
> +	if (unlikely(IS_GEN6(dev) &&
> +	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
> +	    !target_i915_obj->has_global_gtt_mapping)) {
> +		i915_gem_gtt_bind_object(target_i915_obj,
> +					 target_i915_obj->cache_level);
> +		target_i915_obj->has_global_gtt_mapping = 1;

i915_gem_gtt_bind_object() sets has_global_gtt_mapping, so no need to
repeat ourselves here.

I guess that was the easy one you throw in to make sure people are
reading your patches?

A little uneasy still with that heuristic, but I have to agree that it
is the lesser of the evils, meh.

I'm pretty happy now with this series as I've been beating upon it ever
since it landed in danvet/my-next, so
Reviewed-and-tested-by: Chris Wilson <chris at chris-wilson.co.uk>

Chris Wilson, Intel Open Source Technology Centre

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