[Intel-gfx] [PATCH 3/5] drm/i915: implement SNB workaround for lazy global gtt

[Daniel Vetter]

On Wed, Feb 15, 2012 at 11:10:08PM +0000, Chris Wilson wrote:
> On Wed, 15 Feb 2012 23:50:23 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> > +	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
> > +	 * pipe_control writes because the gpu doesn't properly redirect them
> > +	 * through the ppgtt for non_secure batchbuffers. */
> > +	if (unlikely(IS_GEN6(dev) &&
> > +	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
> > +	    !target_i915_obj->has_global_gtt_mapping)) {
> > +		i915_gem_gtt_bind_object(target_i915_obj,
> > +					 target_i915_obj->cache_level);
> > +		target_i915_obj->has_global_gtt_mapping = 1;
> 
> i915_gem_gtt_bind_object() sets has_global_gtt_mapping, so no need to
> repeat ourselves here.

Indeed, that's superflous. I'll kill this line when applying it (the
machine with the patches is already down and I'm a lazy bastard ...).

> I guess that was the easy one you throw in to make sure people are
> reading your patches?
> 
> A little uneasy still with that heuristic, but I have to agree that it
> is the lesser of the evils, meh.

Luckily pipe_control writes on snb are extremely broken with ppgtt, so we
should notice immediately if someone sets the wrong domain (as I did in
the broken i-g-t test).

> I'm pretty happy now with this series as I've been beating upon it ever
> since it landed in danvet/my-next, so
> Reviewed-and-tested-by: Chris Wilson <chris at chris-wilson.co.uk>

Thanks,
Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48