[Intel-gfx] [PATCH 0/2] drm/i915: interlaced mode support (G35 VGA/SDVO)

[Peter Ross]

This patch set enables enables interlaced mode output on the VGA
and SDVO connectors of the G35 chipset.

History here: https://bugs.freedesktop.org/show_bug.cgi?id=11220

I have tested the changes on an ASUS P5E-VM-HDMI mainboard with VGA
and HDMI CRTs attached. The G45 and SB documentation suggests that
this will also work on those chipsets. (Wording of the vertical
timing registers is near identical). Feedback welcome.

Peter Ross (2):
  drm/i915: specify vertical timings in frame units for interlaced
    modes (gen4+)
  drm/i915: allow interlaced mode output on the SDVO connector

 drivers/gpu/drm/i915/intel_display.c |    8 ++++++++
 drivers/gpu/drm/i915/intel_sdvo.c    |    2 +-
 2 files changed, 9 insertions(+), 1 deletions(-)

-- 
1.7.5.4

-- Peter
(A907 E02F A6E5 0CD2 34CD 20D2 6760 79C5 AC40 DD6B)
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