[Intel-gfx] [PATCH] drm/i915: enable MI_WTF bit; I mean MI_FLUSH

Chris Wilson chris at chris-wilson.co.uk
Thu Jan 19 11:33:10 CET 2012

On Wed, 18 Jan 2012 20:55:57 -0800, Ben Widawsky <ben at bwidawsk.net> wrote:
> We've seen a few patches now which switch the flush enable bit from bit
> 11 to bit 12 (as the documentation suggests it should be). However this
> turned out to be problematic for us.
> The simulator has shed some light for us. It's not bit 11, and it's not
> bit 12; it's both. Instead of renaming the bits according to the docs
> since we're still really not sure, I've decided to just make the
> MI_FLUSH_ENABLE be both bits. As an aside, the simulator still makes a
> distinction for these two bits, however the error message doesn't seem
> to.
> I don't believe this is actually required for the simulator to be
> function, but it does produce an annoying error message every time
> MI_FLUSH is used without this.

As were changing this to a value that is still inconsistent with the
specs, can we please put a note here as to why this value was chosen and
caveat lector.

Chris Wilson, Intel Open Source Technology Centre

More information about the Intel-gfx mailing list