[Intel-gfx] [PATCH 0/4] [CFT] interlaced support

[Daniel Vetter]

On Fri, Jan 27, 2012 at 02:25:49PM -0200, Paulo Zanoni wrote:
> Ok, so I had to look at the Windows registers again...
> 
> Your "interlaced" branch had 6 patches. Patch 3 is the only one I
> changed. Here is my version:
> http://people.freedesktop.org/~pzanoni/0003-drm-i915-fixup-interlace-vertical-timings-confusion.patch.
> Now my monitor reports "1080i" :)
> 
> Some notes about the patch:
> 
> - I really like your solution of not using CRTC_INTERLACE_HALVE_V,
> because previously we were dividing by 2 and then multiplying by 2
> again, which would not restore the original values in case of odd
> numbers.
> 
> - I'm not sure about the change inside drm_modes.c. Why do we need the
> "|= 1"? I fear it could cause us some troubles. This change might also
> break the other drivers, of course. Wel'll need a "v4".
> 
> - It seems we need vtotal-- and vblank_end--. We need to find evidence
> for that in the documentation. I'm just copying Windows
> 
> - I tested only on SNB. This time the screen looks good (previous
> versions were really ugly). I'll test ilk and report if something goes
> wrong...

I've updated my interlaced branch. Changes:
- Adjust vertical timings as Paulo discovered. I've dropped the change in
  drm_mode.c and instead substract one more from vtotal. I hope that this
  results in the same configuration.
- Added a paranoia patch to not set unsupported bits on gen2.
- Addes support for vsyncshift. The hw seems to use that to correctly
  insert the half-line delay when switching between even and odd fields.
  That might also explain why we have to substract a little bit from
  vtotal and vblank_end.

Testing feedback highly welcome. And if you can, please compare you
register-settings with those from windows/bios. I'll also add the
VSYNCSHIFT registers to intel_reg_dumper.

Cheers, Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48