[Intel-gfx] [PATCH 1/8] drm/i915: clean up interlaced pipeconf bit definitions

[Daniel Vetter]

On Sun, Jan 29, 2012 at 12:09:05PM -0200, Eugeni Dodonov wrote:
> On Sat, Jan 28, 2012 at 11:49, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> 
> > +#define   PIPECONF_PROGRESSIVE                 (0 << 21)
> > +#define   PIPECONF_INTERLACE_W_SYNC_SHIFT_PANEL        (4 << 21) /* gen4
> > only */
> > +#define   PIPECONF_INTERLACE_W_SYNC_SHIFT      (5 << 21) /* gen4 only */
> > +#define   PIPECONF_INTERLACE_W_FIELD_INDICATION        (6 << 21)
> > +#define   PIPECONF_INTERLACE_FIELD_0_ONLY      (7 << 21) /* gen3 only */
> >
> 
> <bikeshedding>
> As you are touching this code, perhaps you could align the
> tabification/spacing as well?
> </bikeshedding>

I've aligned them, unfortunately the additional +/- in the diff creates
havoc if the tab is only one space wide in the real file ;-)
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
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