[Intel-gfx] [PATCH] drm/i915: Export ability of changing cache levels to userspace

[Daniel Vetter]

On Tue, Jul 10, 2012 at 10:27:08AM +0100, Chris Wilson wrote:
> By selecting the cache level (essentially whether or not the CPU snoops
> any updates to the bo, and on more recent machines whether it resides
> inside the CPU's last-level-cache) a userspace driver is able to then
> manage all of its memory within buffer objects, if it so desires. This
> enables the userspace driver to accelerate uploads and more importantly
> downloads from the GPU and to able to mix CPU and GPU rendering/activity
> efficiently.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

I've merged the interface header bits of this patch to reserve the
ioctl number. I'd like to play around some more with the implementation
and merge it in about a week for 3.7.
-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48