[Intel-gfx] [PATCH] drm/i915: Export ability of changing cache levels to userspace
Daniel Vetter
daniel at ffwll.ch
Thu Jul 26 12:34:19 CEST 2012
On Tue, Jul 10, 2012 at 10:27:08AM +0100, Chris Wilson wrote:
> By selecting the cache level (essentially whether or not the CPU snoops
> any updates to the bo, and on more recent machines whether it resides
> inside the CPU's last-level-cache) a userspace driver is able to then
> manage all of its memory within buffer objects, if it so desires. This
> enables the userspace driver to accelerate uploads and more importantly
> downloads from the GPU and to able to mix CPU and GPU rendering/activity
> efficiently.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Ok, I've merged this one and the prep patch to dinq, with the little
comment added that bits 16-31 are reserved for platform madness. Thanks
for the patches.
-Daniel
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
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