[Intel-gfx] [PATCH 37/37] drm/i915: dump registers read/write ops

[Eugeni Dodonov]

This logs all the registers and SBI accesses as they happen.

Note that it is not supposed to go into the final patch series. But there
are too many subtle changes in both HSW and LPT that are much easier to
spot with this extra debugging when attaching a dmesg output in case of
problems.

In other words, this is ugly, but if you run into an issue and send me
dmesg with those included, my chances of investigating the problems will
increase exponentially.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c      |    2 ++
 drivers/gpu/drm/i915/intel_display.c |    2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5fe9d62..f75d16f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1022,6 +1022,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
 		val = read##y(dev_priv->regs + reg); \
 	} \
 	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
+	DRM_DEBUG("I915_READ: 0x%x = 0x%x\n", reg, val); \
 	return val; \
 }
 
@@ -1034,6 +1035,7 @@ __i915_read(64, q)
 #define __i915_write(x, y) \
 void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
 	u32 __fifo_ret = 0; \
+	DRM_DEBUG("I915_WRITE: 0x%x = 0x%x\n", reg, val); \
 	trace_i915_reg_rw(true, reg, val, sizeof(val)); \
 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 10b92e8..fa016f8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1240,6 +1240,7 @@ SBI_WRITE(struct drm_i915_private *dev_priv, u16 reg, u32 value)
 			SBI_READY |
 			SBI_CTL_OP_CRWR);
 
+	DRM_DEBUG("SBI_WRITE: 0x%x = 0x%x\n", reg, value);
 	if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_READY | SBI_RESPONSE)) == 0,
 				10))
 		DRM_ERROR("timeout waiting for SBI to complete write transaction\n");
@@ -1265,6 +1266,7 @@ SBI_READ(struct drm_i915_private *dev_priv, u16 reg)
 
 	value = I915_READ(SBI_DATA);
 
+	DRM_DEBUG("SBI_READ: 0x%x = 0x%x\n", reg, value); \
 	return value;
 }
 
-- 
1.7.9.2