March 2012 Archives by subject
Starting: Thu Mar 1 00:01:46 CET 2012
Ending: Sat Mar 31 19:52:09 CEST 2012
Messages: 736
- [Intel-gfx] 3d driver
Saravanan K
- [Intel-gfx] [PATCH 0/2] RC6 changes for 3.4 got missing
Eugeni Dodonov
- [Intel-gfx] [PATCH 0/2] RC6 changes for 3.4 got missing
Daniel Vetter
- [Intel-gfx] [PATCH 0/2] semaphorify the pageflip BO (if possible)
Ben Widawsky
- [Intel-gfx] [PATCH 0/2] semaphorify the pageflip BO (if possible)
Ben Widawsky
- [Intel-gfx] [PATCH 0/2] semaphorify the pageflip BO (if possible)
Daniel Vetter
- [Intel-gfx] [PATCH 0/2] Two patches relating to ring initialization failure
Sean Paul
- [Intel-gfx] [PATCH 0/2 v4] drm/i915: LVDS channel mode fixes
Takashi Iwai
- [Intel-gfx] [PATCH 0/2 v4] drm/i915: LVDS channel mode fixes
Adam Jackson
- [Intel-gfx] [PATCH 0/2 v5] drm/i915: LVDS channel mode fixes
Takashi Iwai
- [Intel-gfx] [PATCH 0/2 v6] drm/i915: LVDS channel mode fixes
Takashi Iwai
- [Intel-gfx] [PATCH 0/7] A set of SNB workarounds
Daniel Vetter
- [Intel-gfx] [PATCH 00/18] i915 HW Context Support
Ben Widawsky
- [Intel-gfx] [PATCH 00/18] i915 HW Context Support
Ben Widawsky
- [Intel-gfx] [PATCH 00/18] i915 HW Context Support
Daniel Vetter
- [Intel-gfx] [PATCH 00/18] i915 HW Context Support
Daniel Vetter
- [Intel-gfx] [PATCH 00/41] [RFC] Haswell v2
Eugeni Dodonov
- [Intel-gfx] [PATCH 01/16] drm/i915: merge shmem_pwrite slow&fast-path
Daniel Vetter
- [Intel-gfx] [PATCH 01/18] drm/i915: CXT_SIZE register offsets added
Ben Widawsky
- [Intel-gfx] [PATCH 01/22] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro
Jesse Barnes
- [Intel-gfx] [PATCH 01/25] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Jesse Barnes
- [Intel-gfx] [PATCH 01/25] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Eugeni Dodonov
- [Intel-gfx] [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Jesse Barnes
- [Intel-gfx] [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Ben Widawsky
- [Intel-gfx] [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
Daniel Vetter
- [Intel-gfx] [PATCH 01/37] drm/i915: add Haswell devices and their PCI IDs
Eugeni Dodonov
- [Intel-gfx] [PATCH 01/37] drm/i915: add Haswell devices and their PCI IDs
Daniel Vetter
- [Intel-gfx] [PATCH 01/41] drm/i915: transform HAS_PCH_SPLIT in a feature check
Eugeni Dodonov
- [Intel-gfx] [PATCH 02/11] drm/i915: track tlb invalidate GFX_MODE state
Ben Widawsky
- [Intel-gfx] [PATCH 02/11] drm/i915: track tlb invalidate GFX_MODE state
Ben Widawsky
- [Intel-gfx] [PATCH 02/16] drm/i915: merge shmem_pread slow&fast-path
Daniel Vetter
- [Intel-gfx] [PATCH 02/18] drm/i915: preliminary context support
Ben Widawsky
- [Intel-gfx] [PATCH 02/18] drm/i915: preliminary context support
Daniel Vetter
- [Intel-gfx] [PATCH 02/18] drm/i915: preliminary context support
Ben Widawsky
- [Intel-gfx] [PATCH 02/18] drm/i915: preliminary context support
Daniel Vetter
- [Intel-gfx] [PATCH 02/22] drm/i915: ValleyView watermark support
Jesse Barnes
- [Intel-gfx] [PATCH 02/25] drm/i915: add debug message when EDID fetch fails
Jesse Barnes
- [Intel-gfx] [PATCH 02/25] drm/i915: add debug message when EDID fetch fails
Eugeni Dodonov
- [Intel-gfx] [PATCH 02/25] drm/i915: add debug message when EDID fetch fails
Jesse Barnes
- [Intel-gfx] [PATCH 02/25] drm/i915: add debug message when EDID fetch fails
Ben Widawsky
- [Intel-gfx] [PATCH 02/26] drm/i915: re-order GT IIR bit definitions
Jesse Barnes
- [Intel-gfx] [PATCH 02/26] drm/i915: re-order GT IIR bit definitions
Ben Widawsky
- [Intel-gfx] [PATCH 02/26] drm/i915: re-order GT IIR bit definitions
Daniel Vetter
- [Intel-gfx] [PATCH 02/37] drm/i915: add support for LynxPoint PCH
Eugeni Dodonov
- [Intel-gfx] [PATCH 02/37] drm/i915: add support for LynxPoint PCH
Rodrigo Vivi
- [Intel-gfx] [PATCH 02/41] drm/i915: add Haswell devices and their PCI IDs
Eugeni Dodonov
- [Intel-gfx] [PATCH 03/16] drm: add helper to clflush a virtual address range
Daniel Vetter
- [Intel-gfx] [PATCH 03/18] drm/i915: context basic create & destroy
Ben Widawsky
- [Intel-gfx] [PATCH 03/22] drm/i915: PLL defines for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 03/25] drm/i915: re-order GT IIR bit definitions
Jesse Barnes
- [Intel-gfx] [PATCH 03/25] drm/i915: re-order GT IIR bit definitions
Ben Widawsky
- [Intel-gfx] [PATCH 03/25] drm/i915: re-order GT IIR bit definitions
Jesse Barnes
- [Intel-gfx] [PATCH 03/26] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro
Jesse Barnes
- [Intel-gfx] [PATCH 03/26] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro
Ben Widawsky
- [Intel-gfx] [PATCH 03/37] drm/i915: add HAS_PLL_SPLIT macro
Eugeni Dodonov
- [Intel-gfx] [PATCH 03/37] drm/i915: add HAS_PLL_SPLIT macro
Daniel Vetter
- [Intel-gfx] [PATCH 03/41] drm/i915: hook Haswell devices in place
Eugeni Dodonov
- [Intel-gfx] [PATCH 04/16] drm/i915: move clflushing into shmem_pread
Daniel Vetter
- [Intel-gfx] [PATCH 04/18] drm/i915: add context information to objects
Ben Widawsky
- [Intel-gfx] [PATCH 04/18] drm/i915: add context information to objects
Daniel Vetter
- [Intel-gfx] [PATCH 04/18] drm/i915: add context information to objects
Ben Widawsky
- [Intel-gfx] [PATCH 04/18] drm/i915: add context information to objects
Daniel Vetter
- [Intel-gfx] [PATCH 04/18] drm/i915: add context information to objects
Ben Widawsky
- [Intel-gfx] [PATCH 04/22] drm/i915: interrupt bit definitions for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 04/22] drm/i915: interrupt bit definitions for VLV
Daniel Vetter
- [Intel-gfx] [PATCH 04/22] drm/i915: interrupt bit definitions for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 04/22] drm/i915: interrupt bit definitions for VLV
Daniel Vetter
- [Intel-gfx] [PATCH 04/22] drm/i915: interrupt bit definitions for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Jesse Barnes
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Ben Widawsky
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Jesse Barnes
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Ben Widawsky
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Jesse Barnes
- [Intel-gfx] [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
Rodrigo Vivi
- [Intel-gfx] [PATCH 04/26] drm/i915: ValleyView watermark support
Jesse Barnes
- [Intel-gfx] [PATCH 04/26] drm/i915: ValleyView watermark support
Ben Widawsky
- [Intel-gfx] [PATCH 04/26] drm/i915: ValleyView watermark support
Daniel Vetter
- [Intel-gfx] [PATCH 04/26] drm/i915: ValleyView watermark support
Ben Widawsky
- [Intel-gfx] [PATCH 04/37] drm/i915: add haswell into the PCH SPLIT company
Eugeni Dodonov
- [Intel-gfx] [PATCH 04/37] drm/i915: add haswell into the PCH SPLIT company
Daniel Vetter
- [Intel-gfx] [PATCH 04/41] drm/i915: add support for LynxPoint PCH
Eugeni Dodonov
- [Intel-gfx] [PATCH 05/11] drm/i915/context: Preliminary context support
Ben Widawsky
- [Intel-gfx] [PATCH 05/11] drm/i915/context: Preliminary context support
Ben Widawsky
- [Intel-gfx] [PATCH 05/16] drm/i915: kill ranged cpu read domain support
Daniel Vetter
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Ben Widawsky
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Daniel Vetter
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Ben Widawsky
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Daniel Vetter
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Daniel Vetter
- [Intel-gfx] [PATCH 05/18] drm/i915: context switch implementation
Ben Widawsky
- [Intel-gfx] [PATCH 05/22] drm/i915: add DPIO support
Jesse Barnes
- [Intel-gfx] [PATCH 05/25] drm/i915: add DPIO read/write functions for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 05/25] drm/i915: add DPIO read/write functions for ValleyView
Ben Widawsky
- [Intel-gfx] [PATCH 05/26] drm/i915: PLL defines for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 05/26] drm/i915: PLL defines for VLV
Ben Widawsky
- [Intel-gfx] [PATCH 05/37] drm/i915: add support for power wells
Eugeni Dodonov
- [Intel-gfx] [PATCH 05/37] drm/i915: add support for power wells
Rodrigo Vivi
- [Intel-gfx] [PATCH 05/37] drm/i915: add support for power wells
Eugeni Dodonov
- [Intel-gfx] [PATCH 05/41] drm/i915: add support for power wells
Eugeni Dodonov
- [Intel-gfx] [PATCH 06/16] drm/i915: don't use gtt_pwrite on LLC cached objects
Daniel Vetter
- [Intel-gfx] [PATCH 06/18] drm/i915: trace events for contexts
Ben Widawsky
- [Intel-gfx] [PATCH 06/22] drm/i915: add ValleyView clock gating init
Jesse Barnes
- [Intel-gfx] [PATCH 06/25] drm/i915: add ValleyView registers, stub code, and watermark support
Jesse Barnes
- [Intel-gfx] [PATCH 06/25] drm/i915: add ValleyView registers, stub code, and watermark support
Daniel Vetter
- [Intel-gfx] [PATCH 06/26] drm/i915: interrupt bit definitions for VLV
Jesse Barnes
- [Intel-gfx] [PATCH 06/37] drm/i915: add DDI registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 06/37] drm/i915: add DDI registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 06/37] drm/i915: add DDI registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 06/37] drm/i915: add DDI registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 06/41] drm/i915: add enumeration for DDI ports
Eugeni Dodonov
- [Intel-gfx] [PATCH 07/16] drm/i915: don't call shmem_read_mapping unnecessarily
Daniel Vetter
- [Intel-gfx] [PATCH 07/16] drm/i915: don't call shmem_read_mapping unnecessarily
Daniel Vetter
- [Intel-gfx] [PATCH 07/18] drm/i915: Ivybridge MI_ARB_ON_OFF context w/a
Ben Widawsky
- [Intel-gfx] [PATCH 07/22] drm/i915: split PLL update code out of i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 07/25] drm/i915: split out DPLL update code from i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 07/25] drm/i915: split out DPLL update code from i9xx_crtc_mode_set
Daniel Vetter
- [Intel-gfx] [PATCH 07/25] drm/i915: split out DPLL update code from i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 07/26] drm/i915: add ValleyView clock gating init
Jesse Barnes
- [Intel-gfx] [PATCH 07/26] drm/i915: add ValleyView clock gating init
Ben Widawsky
- [Intel-gfx] [PATCH 07/37] drm/i915: add DP_TP_CTL registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 07/37] drm/i915: add DP_TP_CTL registers
Chris Wilson
- [Intel-gfx] [PATCH 07/37] drm/i915: add DP_TP_CTL registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 07/37] drm/i915: add DP_TP_CTL registers
Daniel Vetter
- [Intel-gfx] [PATCH 07/41] drm/i915: add DDI registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 08/11] drm/i915/context: extend contexts to execbuffer2
Ben Widawsky
- [Intel-gfx] [PATCH 08/16] drm/i915: drop gtt slowpath
Daniel Vetter
- [Intel-gfx] [PATCH 08/18] drm/i915: PIPE_CONTROL_TLB_INVALIDATE
Ben Widawsky
- [Intel-gfx] [PATCH 08/22] drm/i915: split LVDS update code out of i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 08/25] drm/i915: ValleyView mode setting limits and PLL functions
Jesse Barnes
- [Intel-gfx] [PATCH 08/25] drm/i915: ValleyView mode setting limits and PLL functions
Ben Widawsky
- [Intel-gfx] [PATCH 08/25] drm/i915: ValleyView mode setting limits and PLL functions
Purushothaman, Vijay A
- [Intel-gfx] [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
Ben Widawsky
- [Intel-gfx] [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
Eugeni Dodonov
- [Intel-gfx] [PATCH 08/37] drm/i915: add DP_TP_STATUS registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 08/37] drm/i915: add DP_TP_STATUS registers
Chris Wilson
- [Intel-gfx] [PATCH 08/41] drm/i915: add DP_TP_CTL registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 09/16] drm/i915: don't clobber userspace memory before commiting to the pread
Daniel Vetter
- [Intel-gfx] [PATCH 09/18] drm/i915: possibly invalidate TLB before context switch
Ben Widawsky
- [Intel-gfx] [PATCH 09/18] drm/i915: possibly invalidate TLB before context switch
Daniel Vetter
- [Intel-gfx] [PATCH 09/18] drm/i915: possibly invalidate TLB before context switch
Ben Widawsky
- [Intel-gfx] [PATCH 09/18] drm/i915: possibly invalidate TLB before context switch
Daniel Vetter
- [Intel-gfx] [PATCH 09/22] drm/i915: ValleyView mode setting limits and PLL functions
Jesse Barnes
- [Intel-gfx] [PATCH 09/25] drm/915: program driain latency regs on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 09/25] drm/915: program driain latency regs on ValleyView
Daniel Vetter
- [Intel-gfx] [PATCH 09/25] drm/915: program driain latency regs on ValleyView
Adam Jackson
- [Intel-gfx] [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set
Ben Widawsky
- [Intel-gfx] [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set
Daniel Vetter
- [Intel-gfx] [PATCH 09/37] drm/i915: add definitions for DDI_BUF_CTL registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 09/37] drm/i915: add definitions for DDI_BUF_CTL registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 09/41] drm/i915: add DP_TP_STATUS registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 1/1] drm/i915: add Ivy Bridge GT2 Server entries
Eugeni Dodonov
- [Intel-gfx] [PATCH 1/1] intel: add Ivy Bridge GT2 server variant
Eugeni Dodonov
- [Intel-gfx] [PATCH 1/1] intel_driver: add support for Ivy Bridge GT2 Server chipset
Eugeni Dodonov
- [Intel-gfx] [PATCH 1/1] intel_driver: add support for Ivy Bridge GT2 Server chipset
Chris Wilson
- [Intel-gfx] [PATCH 1/2] build: make sure we have asprintf
Ben Widawsky
- [Intel-gfx] [PATCH 1/2] drm/i915/sdov: switch IS_SDVOB to a flag
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915/sdov: switch IS_SDVOB to a flag
Chris Wilson
- [Intel-gfx] [PATCH 1/2] drm/i915: Add BUG_ON when ring->private is NULL
Sean Paul
- [Intel-gfx] [PATCH 1/2] drm/i915: Add BUG_ON when ring->private is NULL
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: Add BUG_ON when ring->private is NULL
Sean Paul
- [Intel-gfx] [PATCH 1/2] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH 1/2] drm/i915: allow to select rc6 modes via kernel parameter
Eugeni Dodonov
- [Intel-gfx] [PATCH 1/2] drm/i915: allow to select rc6 modes via kernel parameter
Ben Widawsky
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Takashi Iwai
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Rodrigo Vivi
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
Paulo Zanoni
- [Intel-gfx] [PATCH 1/2] drm/i915: extract ring sync code
Ben Widawsky
- [Intel-gfx] [PATCH 1/2] drm/i915: extract ring sync code
Chris Wilson
- [Intel-gfx] [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB
Jesse Barnes
- [Intel-gfx] [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB
Jesse Barnes
- [Intel-gfx] [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB
Keith Packard
- [Intel-gfx] [PATCH 1/2] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: Pull MTRR setup to its own function
Adam Jackson
- [Intel-gfx] [PATCH 1/2] drm/i915: Pull MTRR setup to its own function
Kenneth Graunke
- [Intel-gfx] [PATCH 1/2] drm/i915: Reorganise rules for get_fence/put_fence
Chris Wilson
- [Intel-gfx] [PATCH 1/2] drm/i915: Reorganise rules for get_fence/put_fence
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: ring irq cleanups
Ben Widawsky
- [Intel-gfx] [PATCH 1/2] drm/i915: ring irq cleanups
Chris Wilson
- [Intel-gfx] [PATCH 1/2] drm/i915: ring irq cleanups
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] drm/i915: split LVDS update code out of i9xx_crtc_mode_set
Daniel Vetter
- [Intel-gfx] [PATCH 1/2] intel: Add support for overriding the PCI ID via an environment variable
Julien Cristau
- [Intel-gfx] [PATCH 1/2] intel: Add support for overriding the PCI ID via an environment variable
Eric Anholt
- [Intel-gfx] [PATCH 1/2] intel: Add support for overriding the PCI ID via an environment variable
Eric Anholt
- [Intel-gfx] [PATCH 1/2] intel: Add support for overriding the PCI ID via an environment variable
Yuanhan Liu
- [Intel-gfx] [PATCH 1/2] intel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.
Eric Anholt
- [Intel-gfx] [PATCH 1/3] build: make sure we have asprintf
Ben Widawsky
- [Intel-gfx] [PATCH 1/3] build: make sure we have asprintf
Ben Widawsky
- [Intel-gfx] [PATCH 1/3] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH 1/3] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH 1/3] drm/i915: rip out old HWSTAM missed irq WA for vlv
Daniel Vetter
- [Intel-gfx] [PATCH 1/3] drm/i915: s/i915_gem_do_init/i915_gem_init_global_gtt
Daniel Vetter
- [Intel-gfx] [PATCH 1/3] drm/i915: s/i915_gem_do_init/i915_gem_init_global_gtt
Chris Wilson
- [Intel-gfx] [PATCH 1/3] drm/i915: s/i915_gem_do_init/i915_gem_init_global_gtt
Daniel Vetter
- [Intel-gfx] [PATCH 1/3] drm/i915: s/i915_gem_do_init/i915_gem_init_global_gtt
Jesse Barnes
- [Intel-gfx] [PATCH 1/3] x86: EXPORT_SYMBOL(pat_enabled)
Adam Jackson
- [Intel-gfx] [PATCH 1/5] drm/i915: Release the mmap offset when purging a buffer
Daniel Vetter
- [Intel-gfx] [PATCH 1/7] drm/i915: implement ColorBlt w/a
Daniel Vetter
- [Intel-gfx] [PATCH 1/7] drm/i915: implement ColorBlt w/a
Chris Wilson
- [Intel-gfx] [PATCH 1/7] drm/i915: implement ColorBlt w/a
Chris Wilson
- [Intel-gfx] [PATCH 10/16] drm/i915: implement inline clflush for pwrite
Daniel Vetter
- [Intel-gfx] [PATCH 10/18] drm/i915: use the default context
Ben Widawsky
- [Intel-gfx] [PATCH 10/22] drm/i915: program drain latency regs on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 10/25] drm/i915: Enable DP panel power sequencing for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 10/25] drm/i915: Enable DP panel power sequencing for ValleyView
Ben Widawsky
- [Intel-gfx] [PATCH 10/26] drm/i915: split LVDS update code out of i9xx_crtc_mode_set
Jesse Barnes
- [Intel-gfx] [PATCH 10/26] drm/i915: split LVDS update code out of i9xx_crtc_mode_set
Daniel Vetter
- [Intel-gfx] [PATCH 10/37] drm/i915: add definition of LPT FDI port width registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 10/37] drm/i915: add definition of LPT FDI port width registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 10/41] drm/i915: add definitions for DDI_BUF_CTL registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 11/16] drm/i915: fall back to shmem pwrite when the buffer is not accessible
Daniel Vetter
- [Intel-gfx] [PATCH 11/18] drm/i915: switch to default context on idle
Ben Widawsky
- [Intel-gfx] [PATCH 11/18] drm/i915: switch to default context on idle
Daniel Vetter
- [Intel-gfx] [PATCH 11/18] drm/i915: switch to default context on idle
Chris Wilson
- [Intel-gfx] [PATCH 11/18] drm/i915: switch to default context on idle
Ben Widawsky
- [Intel-gfx] [PATCH 11/18] drm/i915: switch to default context on idle
Daniel Vetter
- [Intel-gfx] [PATCH 11/22] drm/i915: Enable DP panel power sequencing for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 11/22] drm/i915: Enable DP panel power sequencing for ValleyView
Daniel Vetter
- [Intel-gfx] [PATCH 11/22] drm/i915: Enable DP panel power sequencing for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 11/25] drm/i915: Enable HDMI on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 11/25] drm/i915: Enable HDMI on ValleyView
Daniel Vetter
- [Intel-gfx] [PATCH 11/25] drm/i915: Enable HDMI on ValleyView
Shobhit Kumar
- [Intel-gfx] [PATCH 11/26] drm/i915: ValleyView mode setting limits and PLL functions
Jesse Barnes
- [Intel-gfx] [PATCH 11/37] drm/i915: add definition of DDI buffer translations regs
Eugeni Dodonov
- [Intel-gfx] [PATCH 11/37] drm/i915: add definition of DDI buffer translations regs
Rodrigo Vivi
- [Intel-gfx] [PATCH 11/37] drm/i915: add definition of DDI buffer translations regs
Daniel Vetter
- [Intel-gfx] [PATCH 11/41] drm/i915: add definition of DDI buffer translations regs
Eugeni Dodonov
- [Intel-gfx] [PATCH 12/16] drm/i915: use uncached writes in pwrite
Daniel Vetter
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Ben Widawsky
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Daniel Vetter
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Jesse Barnes
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Daniel Vetter
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Ben Widawsky
- [Intel-gfx] [PATCH 12/18] drm/i915: try to reset the gpu before unload
Daniel Vetter
- [Intel-gfx] [PATCH 12/22] drm/i915: Enable HDMI on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 12/25] agp/intel: map more registers for use by the GTT code
Jesse Barnes
- [Intel-gfx] [PATCH 12/25] agp/intel: map more registers for use by the GTT code
Daniel Vetter
- [Intel-gfx] [PATCH 12/26] drm/i915: program drain latency regs on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 12/26] drm/i915: program drain latency regs on ValleyView
Ben Widawsky
- [Intel-gfx] [PATCH 12/37] drm/i915: add SBI registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 12/37] drm/i915: add SBI registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 12/37] drm/i915: add SBI registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 12/37] drm/i915: add SBI registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 12/41] drm/i915: add definition of LPT FDI port width registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 12/41] drm/i915: add definition of LPT FDI port width registers
Daniel Vetter
- [Intel-gfx] [PATCH 13/16] drm/i915: extract copy helpers from shmem_pread|pwrite
Daniel Vetter
- [Intel-gfx] [PATCH 13/16] drm/i915: extract copy helpers from shmem_pread|pwrite
Chris Wilson
- [Intel-gfx] [PATCH 13/18] drm/i915/context: create & destroy ioctls
Ben Widawsky
- [Intel-gfx] [PATCH 13/18] drm/i915/context: create & destroy ioctls
Daniel Vetter
- [Intel-gfx] [PATCH 13/18] drm/i915/context: create & destroy ioctls
Ben Widawsky
- [Intel-gfx] [PATCH 13/18] drm/i915/context: create & destroy ioctls
Daniel Vetter
- [Intel-gfx] [PATCH 13/22] agp/intel: map more registers for use by the GTT code
Jesse Barnes
- [Intel-gfx] [PATCH 13/25] agp/intel: add Valleyview specific PTE entry function
Jesse Barnes
- [Intel-gfx] [PATCH 13/25] agp/intel: add Valleyview specific PTE entry function
Daniel Vetter
- [Intel-gfx] [PATCH 13/26] drm/i915: Enable DP panel power sequencing for ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 13/37] drm/i915: add support for SBI ops
Eugeni Dodonov
- [Intel-gfx] [PATCH 13/37] drm/i915: add support for SBI ops
Daniel Vetter
- [Intel-gfx] [PATCH 13/37] drm/i915: add support for SBI ops
Chris Wilson
- [Intel-gfx] [PATCH 13/41] drm/i915: add SBI registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 14/16] mm: extend prefault helpers to fault in more than PAGE_SIZE
Daniel Vetter
- [Intel-gfx] [PATCH 14/16] mm: extend prefault helpers to fault in more than PAGE_SIZE
Chris Wilson
- [Intel-gfx] [PATCH 14/18] drm/i915/context: switch contexts with execbuf2
Ben Widawsky
- [Intel-gfx] [PATCH 14/18] drm/i915/context: switch contexts with execbuf2
Daniel Vetter
- [Intel-gfx] [PATCH 14/18] drm/i915/context: switch contexts with execbuf2
Ben Widawsky
- [Intel-gfx] [PATCH 14/18] drm/i915/context: switch contexts with execbuf2
Daniel Vetter
- [Intel-gfx] [PATCH 14/22] agp/intel: add ValleyView AGP driver
Jesse Barnes
- [Intel-gfx] [PATCH 14/25] agp/intel: always use uncached mappings on VLV
Jesse Barnes
- [Intel-gfx] [PATCH 14/25] agp/intel: always use uncached mappings on VLV
Daniel Vetter
- [Intel-gfx] [PATCH 14/25] agp/intel: always use uncached mappings on VLV
Daniel Vetter
- [Intel-gfx] [PATCH 14/26] drm/i915: Enable HDMI on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 14/37] drm/i915: add PIXCLK_GATE register
Eugeni Dodonov
- [Intel-gfx] [PATCH 14/37] drm/i915: add PIXCLK_GATE register
Rodrigo Vivi
- [Intel-gfx] [PATCH 14/41] drm/i915: add support for SBI ops
Eugeni Dodonov
- [Intel-gfx] [PATCH 14/41] drm/i915: add support for SBI ops
Daniel Vetter
- [Intel-gfx] [PATCH 15/16] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Daniel Vetter
- [Intel-gfx] [PATCH 15/16] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Chris Wilson
- [Intel-gfx] [PATCH 15/16] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Daniel Vetter
- [Intel-gfx] [PATCH 15/16] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Chris Wilson
- [Intel-gfx] [PATCH 15/18] drm/i915/context: add params
Ben Widawsky
- [Intel-gfx] [PATCH 15/22] agp/intel: bind ValleyView AGP driver
Jesse Barnes
- [Intel-gfx] [PATCH 15/25] drm/i915: add ValleyView specific CRT detect function
Jesse Barnes
- [Intel-gfx] [PATCH 15/26] agp/intel: map more registers for use by the GTT code
Jesse Barnes
- [Intel-gfx] [PATCH 15/26] agp/intel: map more registers for use by the GTT code
Ben Widawsky
- [Intel-gfx] [PATCH 15/26] agp/intel: map more registers for use by the GTT code
Daniel Vetter
- [Intel-gfx] [PATCH 15/37] drm/i915: add S PLL control
Eugeni Dodonov
- [Intel-gfx] [PATCH 15/37] drm/i915: add S PLL control
Rodrigo Vivi
- [Intel-gfx] [PATCH 15/41] drm/i915: add PIXCLK_GATE register
Eugeni Dodonov
- [Intel-gfx] [PATCH 16/16] drm/i915: mark pwrite/pread slowpaths with unlikely
Daniel Vetter
- [Intel-gfx] [PATCH 16/16] drm/i915: mark pwrite/pread slowpaths with unlikely
Chris Wilson
- [Intel-gfx] [PATCH 16/16] drm/i915: mark pwrite/pread slowpaths with unlikely
Daniel Vetter
- [Intel-gfx] [PATCH 16/18] drm/i915/context: anonymous context interfaces
Ben Widawsky
- [Intel-gfx] [PATCH 16/18] drm/i915/context: anonymous context interfaces
Daniel Vetter
- [Intel-gfx] [PATCH 16/22] drm/i915: add ValleyView specific CRT detect function
Jesse Barnes
- [Intel-gfx] [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
Jesse Barnes
- [Intel-gfx] [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
Daniel Vetter
- [Intel-gfx] [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
Jesse Barnes
- [Intel-gfx] [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
Adam Jackson
- [Intel-gfx] [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
Jesse Barnes
- [Intel-gfx] [PATCH 16/26] agp/intel: add ValleyView AGP driver
Jesse Barnes
- [Intel-gfx] [PATCH 16/26] agp/intel: add ValleyView AGP driver
Ben Widawsky
- [Intel-gfx] [PATCH 16/26] agp/intel: add ValleyView AGP driver
Daniel Vetter
- [Intel-gfx] [PATCH 16/26] agp/intel: add ValleyView AGP driver
Ben Widawsky
- [Intel-gfx] [PATCH 16/37] drm/i915: add port clock selection support for HSW
Eugeni Dodonov
- [Intel-gfx] [PATCH 16/37] drm/i915: add port clock selection support for HSW
Rodrigo Vivi
- [Intel-gfx] [PATCH 16/41] drm/i915: add S PLL control
Eugeni Dodonov
- [Intel-gfx] [PATCH 17/18] drm/i915: Ironlake rc6 can use context interfaces
Ben Widawsky
- [Intel-gfx] [PATCH 17/18] drm/i915: Ironlake rc6 can use context interfaces
Daniel Vetter
- [Intel-gfx] [PATCH 17/22] drm/i915: add ValleyView specific force wake get/put functions
Jesse Barnes
- [Intel-gfx] [PATCH 17/25] drm/i915: ValleyView cacheability is different
Jesse Barnes
- [Intel-gfx] [PATCH 17/25] drm/i915: ValleyView cacheability is different
Daniel Vetter
- [Intel-gfx] [PATCH 17/25] drm/i915: ValleyView cacheability is different
Jesse Barnes
- [Intel-gfx] [PATCH 17/26] agp/intel: bind ValleyView AGP driver
Jesse Barnes
- [Intel-gfx] [PATCH 17/37] drm/i915: add SSC offsets for SBI access
Eugeni Dodonov
- [Intel-gfx] [PATCH 17/37] drm/i915: add SSC offsets for SBI access
Rodrigo Vivi
- [Intel-gfx] [PATCH 17/41] drm/i915: add port clock selection support for HSW
Eugeni Dodonov
- [Intel-gfx] [PATCH 18/18] drm/i915: try to enable rc6 on Ironlake... again
Ben Widawsky
- [Intel-gfx] [PATCH 18/22] drm/i915: ValleyView IRQ support
Jesse Barnes
- [Intel-gfx] [PATCH 18/22] drm/i915: ValleyView IRQ support
Daniel Vetter
- [Intel-gfx] [PATCH 18/22] drm/i915: ValleyView IRQ support
Daniel Vetter
- [Intel-gfx] [PATCH 18/25] drm/i915: ValleyView IRQ support
Jesse Barnes
- [Intel-gfx] [PATCH 18/26] drm/i915: add ValleyView specific CRT detect function
Jesse Barnes
- [Intel-gfx] [PATCH 18/26] drm/i915: add ValleyView specific CRT detect function
Eugeni Dodonov
- [Intel-gfx] [PATCH 18/37] drm/i915: add GTC registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 18/37] drm/i915: add GTC registers
Chris Wilson
- [Intel-gfx] [PATCH 18/37] drm/i915: add GTC registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 18/41] drm/i915: add SSC offsets for SBI access
Eugeni Dodonov
- [Intel-gfx] [PATCH 19/22] drm/i915: check for disabled interrupts on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView
Daniel Vetter
- [Intel-gfx] [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions
Jesse Barnes
- [Intel-gfx] [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions
Eugeni Dodonov
- [Intel-gfx] [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions
Ben Widawsky
- [Intel-gfx] [PATCH 19/37] drm/i915: add LCPLL control registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 19/37] drm/i915: add LCPLL control registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 19/37] drm/i915: add LCPLL control registers
Daniel Vetter
- [Intel-gfx] [PATCH 19/37] drm/i915: add LCPLL control registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 19/41] drm/i915: add LCPLL control registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 2/2] drm/i915: [dinq] fix two instances -Wunitialized
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Takashi Iwai
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Eugeni Dodonov
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Takashi Iwai
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Takashi Iwai
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Takashi Iwai
- [Intel-gfx] [PATCH 2/2] drm/i915: Add lvds_channel module option
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: Add wait_for in init_ring_common
Sean Paul
- [Intel-gfx] [PATCH 2/2] drm/i915: Add wait_for in init_ring_common
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: Add wait_for in init_ring_common
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: Don't do MTRR setup if PAT is enabled
Adam Jackson
- [Intel-gfx] [PATCH 2/2] drm/i915: Don't do MTRR setup if PAT is enabled
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: enable plain RC6 on Sandy Bridge by default
Eugeni Dodonov
- [Intel-gfx] [PATCH 2/2] drm/i915: enable plain RC6 on Sandy Bridge by default
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: mark pwrite/pread slowpaths with unlikely
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: open code gen6+ ring irqs
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: rc6 in sysfs
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: Remove fence pipelining infrastructure
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: Remove fence pipelining infrastructure
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: Remove fence pipelining infrastructure
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: Remove fence pipelining infrastructure
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: split PLL update code out of i9xx_crtc_mode_set
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Chris Wilson
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Daniel Vetter
- [Intel-gfx] [PATCH 2/2] drm/i915: use semaphores for the display plane
Chris Wilson
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Eric Anholt
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Yuanhan Liu
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Paul Menzel
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Eric Anholt
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Kenneth Graunke
- [Intel-gfx] [PATCH 2/2] intel: Add .aub file output support.
Yuanhan Liu
- [Intel-gfx] [PATCH 2/2] intel: Add per-dword decode of gen7 3DPRIMITIVE.
Eric Anholt
- [Intel-gfx] [PATCH 2/2] tests: rc6 residency test
Ben Widawsky
- [Intel-gfx] [PATCH 2/2] tests: rc6 residency test
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: extract card getting
Ben Widawsky
- [Intel-gfx] [PATCH 2/3] drm/i915: extract card getting
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: extract card getting
Ben Widawsky
- [Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
Ben Widawsky
- [Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
Ben Widawsky
- [Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
Ben Widawsky
- [Intel-gfx] [PATCH 2/3] drm/i915: Pull MTRR setup to its own function
Adam Jackson
- [Intel-gfx] [PATCH 2/3] drm/i915: the intel gtt is _not_ an agp bridge!
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: the intel gtt is _not_ an agp bridge!
Chris Wilson
- [Intel-gfx] [PATCH 2/3] drm/i915: the intel gtt is _not_ an agp bridge!
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: the intel gtt is _not_ an agp bridge!
Daniel Vetter
- [Intel-gfx] [PATCH 2/3] drm/i915: use render gen to switch ring irq functions
Daniel Vetter
- [Intel-gfx] [PATCH 2/7] drm/i915: implement a media hang w/a
Daniel Vetter
- [Intel-gfx] [PATCH 20/22] drm/i915: add HDMI and DP port enumeration on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 20/25] drm/i915: check for disabled interrupts on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 20/26] drm/i915: ValleyView has limited cacheability
Jesse Barnes
- [Intel-gfx] [PATCH 20/26] drm/i915: ValleyView has limited cacheability
Jesse Barnes
- [Intel-gfx] [PATCH 20/26] drm/i915: ValleyView has limited cacheability
Ben Widawsky
- [Intel-gfx] [PATCH 20/26] drm/i915: ValleyView has limited cacheability
Daniel Vetter
- [Intel-gfx] [PATCH 20/26] drm/i915: ValleyView has limited cacheability
Jesse Barnes
- [Intel-gfx] [PATCH 20/37] drm/i915: add WM_LINETIME registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 20/37] drm/i915: add WM_LINETIME registers
Rodrigo Vivi
- [Intel-gfx] [PATCH 20/41] drm/i915: add WRPLL clocks
Eugeni Dodonov
- [Intel-gfx] [PATCH 21/22] drm/i915: disable turbo on ValleyView for now
Jesse Barnes
- [Intel-gfx] [PATCH 21/22] drm/i915: disable turbo on ValleyView for now
Daniel Vetter
- [Intel-gfx] [PATCH 21/22] drm/i915: disable turbo on ValleyView for now
Jesse Barnes
- [Intel-gfx] [PATCH 21/25] drm/i915: add HDMI and DP port enumeration on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 21/26] drm/i915: ValleyView IRQ support
Jesse Barnes
- [Intel-gfx] [PATCH 21/37] drm/i915: calculate watermarks on Gen7 archs in one place
Eugeni Dodonov
- [Intel-gfx] [PATCH 21/37] drm/i915: calculate watermarks on Gen7 archs in one place
Chris Wilson
- [Intel-gfx] [PATCH 21/37] drm/i915: calculate watermarks on Gen7 archs in one place
Daniel Vetter
- [Intel-gfx] [PATCH 21/41] drm/i915: add WM_LINETIME registers
Eugeni Dodonov
- [Intel-gfx] [PATCH 22/22] drm/i915: bind driver to ValleyView chipsets
Jesse Barnes
- [Intel-gfx] [PATCH 22/25] drm/i915: remove some unneeded debug messages
Jesse Barnes
- [Intel-gfx] [PATCH 22/25] drm/i915: remove some unneeded debug messages
Daniel Vetter
- [Intel-gfx] [PATCH 22/25] drm/i915: remove some unneeded debug messages
Daniel Vetter
- [Intel-gfx] [PATCH 22/25] drm/i915: remove some unneeded debug messages
Jesse Barnes
- [Intel-gfx] [PATCH 22/26] drm/i915: display regs are at 0x180000 on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 22/37] drm/i915: program WM_LINETIME on Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 22/37] drm/i915: program WM_LINETIME on Haswell
Chris Wilson
- [Intel-gfx] [PATCH 22/41] drm/i915: add SFUSE_STRAP registers for digital port detection
Eugeni Dodonov
- [Intel-gfx] [PATCH 22/41] drm/i915: add SFUSE_STRAP registers for digital port detection
Daniel Vetter
- [Intel-gfx] [PATCH 23/25] drm/i915: add ValleyView clock gating init
Jesse Barnes
- [Intel-gfx] [PATCH 23/25] drm/i915: add ValleyView clock gating init
Daniel Vetter
- [Intel-gfx] [PATCH 23/26] drm/i915: check for disabled interrupts on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 23/37] drm/i915: do not set 6BPP dithering on haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 23/37] drm/i915: do not set 6BPP dithering on haswell
Daniel Vetter
- [Intel-gfx] [PATCH 23/37] drm/i915: do not set 6BPP dithering on haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 23/41] drm/i915: calculate same watermarks on Haswell as on Ivy Bridge
Eugeni Dodonov
- [Intel-gfx] [PATCH 24/25] drm/i915: add has_turbo bit to driver info struct
Jesse Barnes
- [Intel-gfx] [PATCH 24/25] drm/i915: add has_turbo bit to driver info struct
Daniel Vetter
- [Intel-gfx] [PATCH 24/26] drm/i915: add HDMI and DP port enumeration on ValleyView
Jesse Barnes
- [Intel-gfx] [PATCH 24/37] drm/i915: share forcewaking code between IVB and HSW
Eugeni Dodonov
- [Intel-gfx] [PATCH 24/37] drm/i915: share forcewaking code between IVB and HSW
Rodrigo Vivi
- [Intel-gfx] [PATCH 24/41] drm/i915: share forcewaking code between IVB and HSW
Eugeni Dodonov
- [Intel-gfx] [PATCH 25/25] drm/i915: don't write ring regs until they're set up
Jesse Barnes
- [Intel-gfx] [PATCH 25/25] drm/i915: don't write ring regs until they're set up
Daniel Vetter
- [Intel-gfx] [PATCH 25/25] drm/i915: don't write ring regs until they're set up
Jesse Barnes
- [Intel-gfx] [PATCH 25/26] drm/i915: disable turbo on ValleyView for now
Jesse Barnes
- [Intel-gfx] [PATCH 25/26] drm/i915: disable turbo on ValleyView for now
Eugeni Dodonov
- [Intel-gfx] [PATCH 25/37] drm/i915: haswell has 3 pipes as well
Eugeni Dodonov
- [Intel-gfx] [PATCH 25/37] drm/i915: haswell has 3 pipes as well
Rodrigo Vivi
- [Intel-gfx] [PATCH 25/41] drm/i915: haswell has 3 pipes as well
Eugeni Dodonov
- [Intel-gfx] [PATCH 26/26] drm/i915: bind driver to ValleyView chipsets
Jesse Barnes
- [Intel-gfx] [PATCH 26/37] drm/i915: reuse Ivybridge interrupts code for Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 26/37] drm/i915: reuse Ivybridge interrupts code for Haswell
Daniel Vetter
- [Intel-gfx] [PATCH 26/37] drm/i915: reuse Ivybridge interrupts code for Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 26/41] drm/i915: reuse Ivybridge interrupts code for Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 26/43] drm/i915: Only clear the GPU domains upon a successful finish
Daniel Vetter
- [Intel-gfx] [PATCH 27/37] drm/i915: share pipe count handling with Ivybridge
Eugeni Dodonov
- [Intel-gfx] [PATCH 27/37] drm/i915: share pipe count handling with Ivybridge
Rodrigo Vivi
- [Intel-gfx] [PATCH 27/41] drm/i915: share pipe count handling with Ivybridge
Eugeni Dodonov
- [Intel-gfx] [PATCH 28/37] drm/i915: share IVB cursor routine with Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 28/37] drm/i915: share IVB cursor routine with Haswell
Rodrigo Vivi
- [Intel-gfx] [PATCH 28/41] drm/i915: share IVB cursor routine with Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 29/37] drm/i915: enable power wells on haswell init
Eugeni Dodonov
- [Intel-gfx] [PATCH 29/37] drm/i915: enable power wells on haswell init
Chris Wilson
- [Intel-gfx] [PATCH 29/41] drm/i915: show unknown sdvox registers on hdmi init
Eugeni Dodonov
- [Intel-gfx] [PATCH 3/3] drm/i915: clear the entire gtt when using gem
Daniel Vetter
- [Intel-gfx] [PATCH 3/3] drm/i915: Don't do MTRR setup if PAT is enabled
Adam Jackson
- [Intel-gfx] [PATCH 3/3] drm/i915: Don't do MTRR setup if PAT is enabled
Adam Jackson
- [Intel-gfx] [PATCH 3/3] drm/i915: extract gt interrupt handler
Daniel Vetter
- [Intel-gfx] [PATCH 3/3] drm/i915: extract gt interrupt handler
Jesse Barnes
- [Intel-gfx] [PATCH 3/3] drm/i915: extract gt interrupt handler
Ben Widawsky
- [Intel-gfx] [PATCH 3/3] drm/i915: extract gt interrupt handler
Daniel Vetter
- [Intel-gfx] [PATCH 3/3] drm/i915: extract gt interrupt handler
Daniel Vetter
- [Intel-gfx] [PATCH 3/3] drm/i915: rc6 in sysfs
Ben Widawsky
- [Intel-gfx] [PATCH 3/3] drm/i915: rc6 in sysfs
Ben Widawsky
- [Intel-gfx] [PATCH 3/3] drm/i915: rc6 in sysfs
Daniel Vetter
- [Intel-gfx] [PATCH 3/3] drm/i915: rc6 in sysfs
Ben Widawsky
- [Intel-gfx] [PATCH 3/5] drm/i915: implement SNB workaround for lazy global gtt
Daniel Vetter
- [Intel-gfx] [PATCH 3/7] drm/i915: set w/a bit for snb pagefaults
Daniel Vetter
- [Intel-gfx] [PATCH 30/37] drm/i915: disable rc6 on haswell for now
Eugeni Dodonov
- [Intel-gfx] [PATCH 30/37] drm/i915: disable rc6 on haswell for now
Rodrigo Vivi
- [Intel-gfx] [PATCH 30/41] drm/i915: enable power wells on haswell init
Eugeni Dodonov
- [Intel-gfx] [PATCH 31/37] drm/i915: enable PCH earlier
Eugeni Dodonov
- [Intel-gfx] [PATCH 31/37] drm/i915: enable PCH earlier
Chris Wilson
- [Intel-gfx] [PATCH 31/37] drm/i915: enable PCH earlier
Jesse Barnes
- [Intel-gfx] [PATCH 31/37] drm/i915: enable PCH earlier
Eugeni Dodonov
- [Intel-gfx] [PATCH 31/41] drm/i915: disable rc6 on haswell for now
Eugeni Dodonov
- [Intel-gfx] [PATCH 32/37] drm/i915: perform Haswell DDI link training in FDI mode
Eugeni Dodonov
- [Intel-gfx] [PATCH 32/37] drm/i915: perform Haswell DDI link training in FDI mode
Rodrigo Vivi
- [Intel-gfx] [PATCH 32/41] drm/i915: program WM_LINETIME on Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 33/37] drm/i915: double-write DDI translation table
Eugeni Dodonov
- [Intel-gfx] [PATCH 33/37] drm/i915: double-write DDI translation table
Rodrigo Vivi
- [Intel-gfx] [PATCH 33/41] drm/i915: initialize DDI buffer translations
Eugeni Dodonov
- [Intel-gfx] [PATCH 34/37] drm/i915: do not use fdi_normal_train on haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 34/37] drm/i915: do not use fdi_normal_train on haswell
Rodrigo Vivi
- [Intel-gfx] [PATCH 34/41] drm/i915: perform Haswell DDI link training in FDI mode
Eugeni Dodonov
- [Intel-gfx] [PATCH 35/37] drm/i915: program iCLKIP on Lynx Point
Eugeni Dodonov
- [Intel-gfx] [PATCH 35/37] drm/i915: program iCLKIP on Lynx Point
Daniel Vetter
- [Intel-gfx] [PATCH 35/37] drm/i915: program iCLKIP on Lynx Point
Rodrigo Vivi
- [Intel-gfx] [PATCH 35/37] drm/i915: program iCLKIP on Lynx Point
Jesse Barnes
- [Intel-gfx] [PATCH 35/41] drm/i915: disable pipe DDI function when disabling pipe
Eugeni Dodonov
- [Intel-gfx] [PATCH 36/37] drm/i915: add warning when using old bits on Haswell/LPT
Eugeni Dodonov
- [Intel-gfx] [PATCH 36/37] drm/i915: add warning when using old bits on Haswell/LPT
Rodrigo Vivi
- [Intel-gfx] [PATCH 36/41] drm/i915: do not use fdi_normal_train on haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 37/37] drm/i915: dump registers read/write ops
Eugeni Dodonov
- [Intel-gfx] [PATCH 37/37] drm/i915: dump registers read/write ops
Chris Wilson
- [Intel-gfx] [PATCH 37/41] drm/i915: program iCLKIP on Lynx Point
Eugeni Dodonov
- [Intel-gfx] [PATCH 38/41] drm/i915: detect digital outputs on Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 39/41] drm/i915: add support for DDI-controlled digital outputs
Eugeni Dodonov
- [Intel-gfx] [PATCH 4/5] drm/i915: Remove the deferred-free list
Daniel Vetter
- [Intel-gfx] [PATCH 4/5] drm/i915: Remove the deferred-free list
Chris Wilson
- [Intel-gfx] [PATCH 4/7] drm/i915: properly set ppgtt cacheability on snb
Daniel Vetter
- [Intel-gfx] [PATCH 40/41] drm/i915: prepare HDMI link for Haswell
Eugeni Dodonov
- [Intel-gfx] [PATCH 41/41] drm/i915: add debugging bits for haswell modesetting
Eugeni Dodonov
- [Intel-gfx] [PATCH 5/7] drm/i915: implement w/a for incorrect guarband clipping
Daniel Vetter
- [Intel-gfx] [PATCH 6/7] drm/i915: implement async flush w/a
Daniel Vetter
- [Intel-gfx] [PATCH 6/7] drm/i915: implement async flush w/a
Chris Wilson
- [Intel-gfx] [PATCH 7/7] drm/i915: set stc evict disable lra evict w/a
Daniel Vetter
- [Intel-gfx] [PATCH] agp/intel: add ValleyView AGP driver
Daniel Vetter
- [Intel-gfx] [PATCH] agp/intel: add ValleyView AGP driver
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915/sdvo: Include YRPB as an additional TV output type
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Add a dual link lvds quirk for MacBook Pro 8, 2
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: add rc6 residency times to debugfs
Eugeni Dodonov
- [Intel-gfx] [PATCH] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: add rc6 residency times to debugfs
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: add rc6 residency times to debugfs
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: apply CS reg readback trick against missed IRQ on snb
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Avoid using mappable space for relocation processing through the CPU
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Avoid using mappable space for relocation processing through the CPU
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Avoid using mappable space for relocation processing through the CPU
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Batch copy_from_user for relocation processing
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Batch copy_from_user for relocation processing
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Batch copy_from_user for relocation processing
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Batch copy_from_user for relocation processing
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Batch copy_from_user for relocation processing
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: disallow gem init ioctl on ilk
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: disallow gem init ioctl on ilk
Adam Jackson
- [Intel-gfx] [PATCH] drm/i915: disallow gem init ioctl on ilk
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: disallow gem init ioctl on ilk
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: don't force dest keying on IVB
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915: Don't write DSPSURF for old chips
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Don't write DSPSURF for old chips
Takashi Iwai
- [Intel-gfx] [PATCH] drm/i915: enable gmbus on gen2
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: enable gmbus on gen2
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: enable gmbus on gen2
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: enable gmbus on gen2
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: enable gmbus on gen2
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: fix swizzling on gen6+
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: fix swizzling on gen6+
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: fixup in-line clflushing on bit17 swizzled bos
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Initialise GTT MTRR to -1
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Initialise GTT MTRR to -1
Adam Jackson
- [Intel-gfx] [PATCH] drm/i915: Initialise GTT MTRR to -1
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: Initialise GTT MTRR to -1
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: Initialise GTT MTRR to -1
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: IVB missed irqs w/a
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: IVB missed irqs w/a
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: make sprite buffer switching asynchronous
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Mark untiled BLT commands as fenced on gen2/3
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Mark untiled BLT commands as fenced on gen2/3
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Mark untiled BLT commands as fenced on gen2/3
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Mark untiled BLT commands as fenced on gen2/3
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: properly clear SSC1 bit in the pch refclock init code
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: properly restore the ppgtt page directory on resume
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: properly restore the ppgtt page directory on resume
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: properly restore the ppgtt page directory on resume
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: properly restore the ppgtt page directory on resume
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: properly restore the ppgtt page directory on resume
Ben Widawsky
- [Intel-gfx] [PATCH] drm/i915: quirk away broken OpRegion VBT
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: quirk away broken OpRegion VBT
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: quirk away broken OpRegion VBT
Rodrigo Vivi
- [Intel-gfx] [PATCH] drm/i915: quirk away broken OpRegion VBT
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915: refuse to load on gen6+ without kms
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: refuse to load on gen6+ without kms
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: refuse to load on gen6+ without kms
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: refuse to load on gen6+ without kms
Adam Jackson
- [Intel-gfx] [PATCH] drm/i915: refuse to load on gen6+ without kms
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: reinstate GM45 TV detection fix
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: reinstate GM45 TV detection fix
Rodrigo Vivi
- [Intel-gfx] [PATCH] drm/i915: reinstate GM45 TV detection fix
Peter Clifton
- [Intel-gfx] [PATCH] drm/i915: reinstate GM45 TV detection fix
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Relax the need-mappable? flag for execbuffers
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Relax the need-mappable? flag for execbuffers
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Retry reading the PCH FDI receiver ISR
Sean Paul
- [Intel-gfx] [PATCH] drm/i915: Retry reading the PCH FDI receiver ISR
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915: Retry reading the PCH FDI receiver ISR
Daniel Vetter
- [Intel-gfx] [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF
Eugeni Dodonov
- [Intel-gfx] [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF
Chris Wilson
- [Intel-gfx] [PATCH] drm/i915: support 32 bit BGR formats in sprite planes
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915: support 32 bit BGR formats in sprite planes
Keith Packard
- [Intel-gfx] [PATCH] drm/i915: treat src w & h as fixed point in sprite handling code
Jesse Barnes
- [Intel-gfx] [PATCH] drm/i915: treat src w & h as fixed point in sprite handling code
Chris Wilson
- [Intel-gfx] [PATCH] intel: Add some PCI IDs for Haswell.
Kenneth Graunke
- [Intel-gfx] [PATCH] intel: Fix a case when mapping large texture fails
Anuj Phogat
- [Intel-gfx] [PATCH] intel: Quiet two more valgrind complaints with recent changes.
Eric Anholt
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Andrew Morton
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Daniel Vetter
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Andrew Morton
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Daniel Vetter
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Andrew Morton
- [Intel-gfx] [PATCH] mm: extend prefault helpers to fault in more than PAGE_SIZE
Daniel Vetter
- [Intel-gfx] [PATCH] tests: rc6 residency test
Ben Widawsky
- [Intel-gfx] [PATCH] tests: rc6 residency test
Ben Widawsky
- [Intel-gfx] [PATCH] xf86-video-intel: Add support for toshiba backlight interface
Akio Idehara
- [Intel-gfx] [PATCH] xf86-video-intel: Add support for toshiba backlight interface
Akio Idehara
- [Intel-gfx] [PATCH] xf86-video-intel: deactivate unused CRTCs
Chris Wilson
- [Intel-gfx] [PATCH] xf86-video-intel: deactivate unused CRTCs
Helge Bahmann
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Daniel Vetter
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Eugeni Dodonov
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Ben Widawsky
- [Intel-gfx] [PATCH v2 1/3] drm/i915: add rc6 residency times to debugfs
Eugeni Dodonov
- [Intel-gfx] [PATCH v2 3/3] drm/i915: rc6 in sysfs
Ben Widawsky
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Ben Widawsky
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Daniel Vetter
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Daniel Vetter
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Ben Widawsky
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Daniel Vetter
- [Intel-gfx] [PATCH v2 3/3] tests: rc6 residency test
Daniel Vetter
- [Intel-gfx] [PULL] drm-intel-fixes
Keith Packard
- [Intel-gfx] [regression] xrandr: cannot find crtc for output eDP1
Oleksij Rempel (fishor)
- [Intel-gfx] [regression] xrandr: cannot find crtc for output eDP1
Oleksij Rempel (fishor)
- [Intel-gfx] [RFC] [PATCH 00/38] Haswell
Eugeni Dodonov
- [Intel-gfx] [RFC] [PATCH 00/38] Haswell
Daniel Vetter
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Ben Widawsky
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Chris Wilson
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Daniel Vetter
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Ben Widawsky
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Daniel Vetter
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Jesse Barnes
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Ben Widawsky
- [Intel-gfx] [RFC] algorithm for handling bad cachelines
Ben Widawsky
- [Intel-gfx] [RFC] drm/i915: opencode get/put irq for gen6+
Ben Widawsky
- [Intel-gfx] [RFC] drm/i915: opencode get/put irq for gen6+
Chris Wilson
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Jesse Barnes
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Jesse Barnes
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Chris Wilson
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Jesse Barnes
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Keith Packard
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Jesse Barnes
- [Intel-gfx] [RFC] drm/i915: read current config at init time to avoid flicker
Keith Packard
- [Intel-gfx] [RFC] ValleyView support
Jesse Barnes
- [Intel-gfx] [RFC] ValleyView support
Daniel Vetter
- [Intel-gfx] [RFC PATCH 00/11] i915 HW context support
Ben Widawsky
- [Intel-gfx] [RFCv2] ValleyView support
Jesse Barnes
- [Intel-gfx] black screen after desktop loading on Lenovo L520
antonio grande
- [Intel-gfx] Broken LVDS output at mode changes
Takashi Iwai
- [Intel-gfx] Broken LVDS output at mode changes
Daniel Vetter
- [Intel-gfx] Broken LVDS output at mode changes
Chris Wilson
- [Intel-gfx] Broken LVDS output at mode changes
Daniel Vetter
- [Intel-gfx] Broken LVDS output at mode changes
Takashi Iwai
- [Intel-gfx] Broken LVDS output at mode changes
Keith Packard
- [Intel-gfx] Broken LVDS output at mode changes
Takashi Iwai
- [Intel-gfx] Broken LVDS output at mode changes
Keith Packard
- [Intel-gfx] Broken LVDS output at mode changes
Takashi Iwai
- [Intel-gfx] Broken LVDS output at mode changes
Keith Packard
- [Intel-gfx] Broken LVDS output at mode changes
Jesse Barnes
- [Intel-gfx] crashes when video mode changes
AW
- [Intel-gfx] drm: i915 hangcheck/GPU errors
Eugeni Dodonov
- [Intel-gfx] Graphics switching and LVDS detection
Andreas Heider
- [Intel-gfx] Graphics switching and LVDS detection
Oliver Seitz
- [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)
Paul Owen
- [Intel-gfx] HDMI output on Ubuntu 12.04 beta
ozzius
- [Intel-gfx] how to enable "wait for vertical sync" on i915 framebuffer driver?
hank peng
- [Intel-gfx] i915_driver_irq_handler: irq 42: nobody cared
Daniel Vetter
- [Intel-gfx] Muhammad Jamil invites you to connect
Muhammad Jamil via Yahoo!
- [Intel-gfx] Need to help on installaling a driver
Love bytes
- [Intel-gfx] Need to help on installaling a driver
Björn Gerhart
- [Intel-gfx] OpenGL Extension support on IVY Bridge
Cheah, Douglas
- [Intel-gfx] OpenGL Extension support on IVY Bridge
Kenneth Graunke
- [Intel-gfx] OpenGL Extension support on IVY Bridge
Cheah, Douglas
- [Intel-gfx] pipe notify for ivb
Jesse Barnes
- [Intel-gfx] please try patch against hibernate breakage
Dave Airlie
- [Intel-gfx] please try patch against hibernate breakage
Daniel Vetter
- [Intel-gfx] Quick Sync support on Linux
David Aiken
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Jesse Barnes
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Daniel Vetter
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Jesse Barnes
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Eugeni Dodonov
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Chris Wilson
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Jesse Barnes
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Eric Anholt
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Jesse Barnes
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Eugeni Dodonov
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Eric Anholt
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Daniel Vetter
- [Intel-gfx] RFC: i915 arch changes to better support new chipsets
Eugeni Dodonov
- [Intel-gfx] Sandy bridge GPU does not support alpha channel?
hank peng
- [Intel-gfx] Scanline wait hack for IVB
Jesse Barnes
- [Intel-gfx] Scanline wait hack for IVB
Jesse Barnes
- [Intel-gfx] Scanline wait hack for IVB
Keith Packard
- [Intel-gfx] Shared memory management
Michal Mocny
- [Intel-gfx] Shared memory management
Ben Widawsky
- [Intel-gfx] Shared memory management
Chris Wilson
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Helge Bahmann
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Adam Jackson
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Adam Jackson
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Chris Wilson
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Rodrigo Vivi
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Adam Jackson
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Daniel Vetter
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Andreas Heider
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Thinkpad T420 and single/dual channel lvds
Takashi Iwai
- [Intel-gfx] Updated -next
Daniel Vetter
- [Intel-gfx] Updated -next
Sun, Yi
- [Intel-gfx] Updated -next
Daniel Vetter
- [Intel-gfx] Updated -next
Daniel Vetter
- [Intel-gfx] Updated -next
Sun, Yi
- [Intel-gfx] VA-API brightness property
Oliver Seitz
- [Intel-gfx] VA-API brightness property
Oliver Seitz
- [Intel-gfx] VA-API brightness property
Xiang, Haihao
- [Intel-gfx] VAAPI crashes X
Angela Schmid
- [Intel-gfx] VAAPI crashes X
Daniel Vetter
- [Intel-gfx] VAAPI crashes X
Angela Schmid
- [Intel-gfx] ValleyView patches
Jesse Barnes
- [Intel-gfx] ValleyView patches
Daniel Vetter
- [Intel-gfx] Video tearing on Sandybridge
Oliver Seitz
Last message date:
Sat Mar 31 19:52:09 CEST 2012
Archived on: Sat Dec 6 09:11:35 CET 2014
This archive was generated by
Pipermail 0.09 (Mailman edition).