[Intel-gfx] [PATCH 01/37] drm/i915: add Haswell devices and their PCI IDs

Daniel Vetter daniel at ffwll.ch
Thu Mar 22 10:57:42 CET 2012


On Wed, Mar 21, 2012 at 10:09:36PM -0300, Eugeni Dodonov wrote:
> This adds product definitions for desktop, mobile and server boards.
> 
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>

Like in the vlv series we need to split this into a second patch, which
just adds the pci ids to the tables, and which will get merged last when
everything works (well, works well enough).
-Daniel

> ---
>  drivers/char/agp/intel-agp.c    |    4 ++++
>  drivers/char/agp/intel-agp.h    |   11 +++++++++++
>  drivers/char/agp/intel-gtt.c    |   14 ++++++++++++++
>  drivers/gpu/drm/i915/i915_drv.c |   23 +++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_drv.h |    2 ++
>  5 files changed, 54 insertions(+)
> 
> diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
> index 962e75d..0ad4933 100644
> --- a/drivers/char/agp/intel-agp.c
> +++ b/drivers/char/agp/intel-agp.c
> @@ -907,6 +907,10 @@ static struct pci_device_id agp_intel_pci_table[] = {
>  	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB),
>  	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB),
>  	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB),
> +	ID(PCI_DEVICE_ID_INTEL_HASWELL_HB),
> +	ID(PCI_DEVICE_ID_INTEL_HASWELL_M_HB),
> +	ID(PCI_DEVICE_ID_INTEL_HASWELL_S_HB),
> +	ID(PCI_DEVICE_ID_INTEL_HASWELL_E_HB),
>  	{ }
>  };
>  
> diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
> index 5da67f1..46394c11 100644
> --- a/drivers/char/agp/intel-agp.h
> +++ b/drivers/char/agp/intel-agp.h
> @@ -234,6 +234,17 @@
>  #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG		0x0166
>  #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB		0x0158  /* Server */
>  #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG		0x015A
> +#define PCI_DEVICE_ID_INTEL_HASWELL_HB				0x0400 /* Desktop */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG		0x0402
> +#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG		0x0412
> +#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB			0x0404 /* Mobile */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG		0x0406
> +#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG		0x0416
> +#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB			0x0408 /* Server */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG		0x040a
> +#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG		0x041a
> +#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */
> +#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04
>  
>  int intel_gmch_probe(struct pci_dev *pdev,
>  			       struct agp_bridge_data *bridge);
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 5cf47ac..f494556 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -1459,6 +1459,20 @@ static const struct intel_gtt_driver_description {
>  	    "Ivybridge", &sandybridge_gtt_driver },
>  	{ PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG,
>  	    "Ivybridge", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
> +	    "Haswell", &sandybridge_gtt_driver },
> +	{ PCI_DEVICE_ID_INTEL_HASWELL_SDV,
> +	    "Haswell", &sandybridge_gtt_driver },
>  	{ 0, NULL, NULL }
>  };
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0694e17..d4f542b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -248,6 +248,22 @@ static const struct intel_device_info intel_ivybridge_m_info = {
>  	.has_llc = 1,
>  };
>  
> +static const struct intel_device_info intel_haswell_d_info = {
> +	.is_haswell = 1, .gen = 7,
> +	.need_gfx_hws = 1, .has_hotplug = 1,
> +	.has_bsd_ring = 1,
> +	.has_blt_ring = 1,
> +	.has_llc = 1,
> +};
> +
> +static const struct intel_device_info intel_haswell_m_info = {
> +	.is_haswell = 1, .gen = 7, .is_mobile = 1,
> +	.need_gfx_hws = 1, .has_hotplug = 1,
> +	.has_bsd_ring = 1,
> +	.has_blt_ring = 1,
> +	.has_llc = 1,
> +};
> +
>  static const struct pci_device_id pciidlist[] = {		/* aka */
>  	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */
>  	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */
> @@ -292,6 +308,13 @@ static const struct pci_device_id pciidlist[] = {		/* aka */
>  	INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
>  	INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
>  	INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
> +	INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
> +	INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
> +	INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
> +	INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
> +	INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
> +	INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
> +	INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
>  	{0, 0, 0}
>  };
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c0f19f5..9a99ef1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -255,6 +255,7 @@ struct intel_device_info {
>  	u8 is_broadwater:1;
>  	u8 is_crestline:1;
>  	u8 is_ivybridge:1;
> +	u8 is_haswell:1;
>  	u8 has_fbc:1;
>  	u8 has_pipe_cxsr:1;
>  	u8 has_hotplug:1;
> @@ -1001,6 +1002,7 @@ struct drm_i915_file_private {
>  #define IS_IRONLAKE_D(dev)	((dev)->pci_device == 0x0042)
>  #define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
>  #define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)->is_ivybridge)
> +#define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)
>  #define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
>  
>  /*
> -- 
> 1.7.9.2
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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