[Intel-gfx] [PATCH 03/37] drm/i915: add HAS_PLL_SPLIT macro

Daniel Vetter daniel at ffwll.ch
Thu Mar 22 11:06:41 CET 2012


On Wed, Mar 21, 2012 at 10:09:38PM -0300, Eugeni Dodonov wrote:
> Ivy Bridge is the only GPU which has split 3-display support over 2 PLLs.
> 
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>

This is imo a strange name for '3 pipes but just 2 plls' hw. And I
couldn't find any usage of this in your series, so I don't know how you
intend to use it. But usually for such narrow, single-chip special cases I
prefer a fe IS_IVB checks in the code instead of this indirection.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.h |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 49488e1..fb50c42 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1048,6 +1048,7 @@ struct drm_i915_file_private {
>  #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
>  
>  #define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> +#define HAS_PLL_SPLIT(dev) (IS_IVYBRIDGE(dev))
>  #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
>  
>  #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
> -- 
> 1.7.9.2
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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