[Intel-gfx] [PATCH 06/37] drm/i915: add DDI registers

[Rodrigo Vivi]

*indentation
and it is missing
#define  PIPE_DDI_MODE_SELECT_DP_MST  (3<<24)

Otherwise:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

On Wed, Mar 21, 2012 at 10:09 PM, Eugeni Dodonov
<eugeni.dodonov at intel.com> wrote:
> There is one set of such registers for each pipe (A/B/C/EDP).
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |   27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ddc9c87..09b2267 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3863,4 +3863,31 @@
>  #define   HSW_PWR_WELL_FORCE_ON        (1<<19)
>  #define HSW_PWR_WELL_CTL6              0x45414
>
> +/* Per-pipe DDI Function Control */
> +#define PIPE_DDI_FUNC_CTL_A                    0x60400
> +#define PIPE_DDI_FUNC_CTL_B                    0x61400
> +#define PIPE_DDI_FUNC_CTL_C                    0x62400
> +#define PIPE_DDI_FUNC_CTL_EDP          0x6F400
> +#define DDI_FUNC_CTL(pipe) _PIPE(pipe, \
> +                                       PIPE_DDI_FUNC_CTL_A, \
> +                                       PIPE_DDI_FUNC_CTL_B)
> +#define  PIPE_DDI_FUNC_ENABLE          (1<<31)
> +/* Those bits are ignored by pipe EDP since it can only connect to DDI A */
> +#define  PIPE_DDI_SELECT_DDI_B (0x1<<28)
> +#define  PIPE_DDI_SELECT_DDI_C (0x2<<28)
> +#define  PIPE_DDI_SELECT_DDI_D (0x3<<28)
> +#define  PIPE_DDI_SELECT_DDI_E (0x4<<28)
> +#define  PIPE_DDI_MODE_SELECT_HDMI     (0<<24)
> +#define  PIPE_DDI_MODE_SELECT_DVI      (1<<24)
> +#define  PIPE_DDI_MODE_SELECT_DP_SST   (2<<24)
> +#define  PIPE_DDI_MODE_SELECT_FDI      (4<<24)
> +#define  PIPE_DDI_BPC_8                                (0<<20)
> +#define  PIPE_DDI_BPC_10                       (1<<20)
> +#define  PIPE_DDI_BPC_6                                (2<<20)
> +#define  PIPE_DDI_BPC_12                       (3<<20)
> +#define  PIPE_DDI_BFI_ENABLE           (1<<4)
> +#define  PIPE_DDI_PORT_WIDTH_X1                        (0<<1)
> +#define  PIPE_DDI_PORT_WIDTH_X2                        (1<<1)
> +#define  PIPE_DDI_PORT_WIDTH_X4                        (3<<1)
> +
>  #endif /* _I915_REG_H_ */
> --
> 1.7.9.2
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
GPG: 0x905BE242 @ wwwkeys.pgp.net